forked from OSchip/llvm-project
Finegrainify namespacification
Implement LiveVariables::getIndexMachineBasicBlock llvm-svn: 11018
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@ -32,8 +32,7 @@
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#include "llvm/Target/TargetMachine.h"
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#include "llvm/Target/TargetMachine.h"
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#include "llvm/Support/CFG.h"
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#include "llvm/Support/CFG.h"
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#include "Support/DepthFirstIterator.h"
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#include "Support/DepthFirstIterator.h"
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using namespace llvm;
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namespace llvm {
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static RegisterAnalysis<LiveVariables> X("livevars", "Live Variable Analysis");
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static RegisterAnalysis<LiveVariables> X("livevars", "Live Variable Analysis");
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@ -42,6 +41,22 @@ LiveVariables::getMachineBasicBlockInfo(MachineBasicBlock *MBB) const{
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return BBMap.find(MBB->getBasicBlock())->second;
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return BBMap.find(MBB->getBasicBlock())->second;
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}
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}
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/// getIndexMachineBasicBlock() - Given a block index, return the
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/// MachineBasicBlock corresponding to it.
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MachineBasicBlock *LiveVariables::getIndexMachineBasicBlock(unsigned Idx) {
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if (BBIdxMap.empty()) {
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BBIdxMap.resize(BBMap.size());
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for (std::map<const BasicBlock*, std::pair<MachineBasicBlock*, unsigned> >
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::iterator I = BBMap.begin(), E = BBMap.end(); I != E; ++I) {
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assert(BBIdxMap.size() > I->second.second &&"Indices are not sequential");
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assert(BBIdxMap[I->second.second] == 0 && "Multiple idx collision!");
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BBIdxMap[I->second.second] = I->second.first;
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}
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}
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assert(Idx < BBIdxMap.size() && "BB Index out of range!");
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return BBIdxMap[Idx];
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}
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LiveVariables::VarInfo &LiveVariables::getVarInfo(unsigned RegIdx) {
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LiveVariables::VarInfo &LiveVariables::getVarInfo(unsigned RegIdx) {
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assert(RegIdx >= MRegisterInfo::FirstVirtualRegister &&
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assert(RegIdx >= MRegisterInfo::FirstVirtualRegister &&
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"getVarInfo: not a virtual register!");
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"getVarInfo: not a virtual register!");
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@ -300,5 +315,3 @@ bool LiveVariables::runOnMachineFunction(MachineFunction &MF) {
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return false;
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return false;
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}
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}
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} // End llvm namespace
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