forked from OSchip/llvm-project
[PowerPC] Add profitablilty check for conversion to mtctr loops
Add profitability checks for modifying counted loops to use the mtctr instruction. The latency of mtctr is only justified if there are more than 4 comparisons that will be removed as a result. Usually counted loops are formed relatively early and before unrolling, so most low trip count loops often don't survive. However we want to ensure that if they do, we do not mistakenly update them to mtctr loops. Use CodeMetrics to ensure we are only doing this for small loops with small trip counts. Differential Revision: https://reviews.llvm.org/D38212 llvm-svn: 315592
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0724fea2da
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@ -26,12 +26,17 @@
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#include "PPC.h"
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#include "PPCSubtarget.h"
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#include "PPCTargetMachine.h"
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#include "PPCTargetTransformInfo.h"
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#include "llvm/ADT/STLExtras.h"
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#include "llvm/ADT/Statistic.h"
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#include "llvm/Analysis/AssumptionCache.h"
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#include "llvm/Analysis/CodeMetrics.h"
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#include "llvm/Analysis/LoopInfo.h"
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#include "llvm/Analysis/ScalarEvolutionExpander.h"
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#include "llvm/Analysis/TargetLibraryInfo.h"
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#include "llvm/Analysis/TargetTransformInfo.h"
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#include "llvm/CodeGen/TargetPassConfig.h"
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#include "llvm/CodeGen/TargetSchedule.h"
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#include "llvm/IR/Constants.h"
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#include "llvm/IR/DerivedTypes.h"
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#include "llvm/IR/Dominators.h"
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@ -64,6 +69,13 @@ using namespace llvm;
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static cl::opt<int> CTRLoopLimit("ppc-max-ctrloop", cl::Hidden, cl::init(-1));
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#endif
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// The latency of mtctr is only justified if there are more than 4
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// comparisons that will be removed as a result.
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static cl::opt<unsigned>
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SmallCTRLoopThreshold("min-ctr-loop-threshold", cl::init(4), cl::Hidden,
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cl::desc("Loops with a constant trip count smaller than "
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"this value will not use the count register."));
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STATISTIC(NumCTRLoops, "Number of loops converted to CTR loops");
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namespace llvm {
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@ -95,6 +107,8 @@ namespace {
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AU.addRequired<DominatorTreeWrapperPass>();
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AU.addPreserved<DominatorTreeWrapperPass>();
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AU.addRequired<ScalarEvolutionWrapperPass>();
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AU.addRequired<AssumptionCacheTracker>();
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AU.addRequired<TargetTransformInfoWrapperPass>();
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}
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private:
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@ -107,10 +121,12 @@ namespace {
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const PPCTargetLowering *TLI;
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const DataLayout *DL;
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const TargetLibraryInfo *LibInfo;
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const TargetTransformInfo *TTI;
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LoopInfo *LI;
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ScalarEvolution *SE;
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DominatorTree *DT;
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bool PreserveLCSSA;
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TargetSchedModel SchedModel;
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};
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char PPCCTRLoops::ID = 0;
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@ -179,6 +195,7 @@ bool PPCCTRLoops::runOnFunction(Function &F) {
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LI = &getAnalysis<LoopInfoWrapperPass>().getLoopInfo();
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SE = &getAnalysis<ScalarEvolutionWrapperPass>().getSE();
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DT = &getAnalysis<DominatorTreeWrapperPass>().getDomTree();
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TTI = &getAnalysis<TargetTransformInfoWrapperPass>().getTTI(F);
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DL = &F.getParent()->getDataLayout();
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auto *TLIP = getAnalysisIfAvailable<TargetLibraryInfoWrapperPass>();
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LibInfo = TLIP ? &TLIP->getTLI() : nullptr;
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@ -462,10 +479,24 @@ bool PPCCTRLoops::mightUseCTR(BasicBlock *BB) {
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return false;
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}
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bool PPCCTRLoops::convertToCTRLoop(Loop *L) {
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bool MadeChange = false;
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// Do not convert small short loops to CTR loop.
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unsigned ConstTripCount = SE->getSmallConstantTripCount(L);
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if (ConstTripCount && ConstTripCount < SmallCTRLoopThreshold) {
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SmallPtrSet<const Value *, 32> EphValues;
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auto AC = getAnalysis<AssumptionCacheTracker>().getAssumptionCache(
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*L->getHeader()->getParent());
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CodeMetrics::collectEphemeralValues(L, &AC, EphValues);
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CodeMetrics Metrics;
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for (BasicBlock *BB : L->blocks())
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Metrics.analyzeBasicBlock(BB, *TTI, EphValues);
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// 6 is an approximate latency for the mtctr instruction.
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if (Metrics.NumInsts <= (6 * SchedModel.getIssueWidth()))
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return false;
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}
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// Process nested loops first.
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for (Loop::iterator I = L->begin(), E = L->end(); I != E; ++I) {
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MadeChange |= convertToCTRLoop(*I);
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@ -1,6 +1,5 @@
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; RUN: llc -verify-machineinstrs -mcpu=pwr7 < %s | FileCheck %s
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; RUN: llc -verify-machineinstrs -mcpu=a2q < %s | FileCheck %s --check-prefix=QPX
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target triple = "powerpc64-unknown-linux-gnu"
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; RUN: llc -mtriple=powerpc64-unknown-linux-gnu -verify-machineinstrs -mcpu=pwr7 < %s | FileCheck %s
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; RUN: llc -mtriple=powerpc64-unknown-linux-gnu -verify-machineinstrs -mcpu=a2q < %s | FileCheck %s --check-prefix=QPX
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declare float @fabsf(float)
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@ -38,6 +37,9 @@ loop_exit:
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; CHECK-LABEL: test1:
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; CHECK-NOT: mtctr
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; CHECK: bl fminf
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; CHECK-NOT: bl fminf
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; CHECK-NOT: mtctr
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; CHECK: blr
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define void @test1v(<4 x float> %f, <4 x float>* %fp) {
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entry:
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@ -48,7 +50,7 @@ loop_body:
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%0 = call <4 x float> @llvm.minnum.v4f32(<4 x float> %f, <4 x float> <float 1.0, float 1.0, float 1.0, float 1.0>)
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store <4 x float> %0, <4 x float>* %fp, align 16
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%1 = add i64 %invar_address.dim.0.01, 1
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%2 = icmp eq i64 %1, 2
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%2 = icmp eq i64 %1, 4
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br i1 %2, label %loop_exit, label %loop_body
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loop_exit:
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@ -56,8 +58,15 @@ loop_exit:
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}
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; CHECK-LABEL: test1v:
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; CHECK: bl fminf
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; CHECK-NOT: mtctr
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; CHECK: bl fminf
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; CHECK-NOT: mtctr
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; CHECK: bl fminf
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; CHECK-NOT: mtctr
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; CHECK: bl fminf
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; CHECK-NOT: bl fminf
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; CHECK: blr
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; QPX-LABEL: test1v:
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; QPX: mtctr
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@ -83,6 +92,9 @@ loop_exit:
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; CHECK-LABEL: test1a:
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; CHECK-NOT: mtctr
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; CHECK: bl fminf
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; CHECK-NOT: bl fminf
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; CHECK-NOT: mtctr
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; CHECK: blr
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define void @test2(float %f, float* %fp) {
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entry:
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@ -103,6 +115,9 @@ loop_exit:
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; CHECK-LABEL: test2:
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; CHECK-NOT: mtctr
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; CHECK: bl fmaxf
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; CHECK-NOT: bl fmaxf
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; CHECK-NOT: mtctr
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; CHECK: blr
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define void @test2v(<4 x double> %f, <4 x double>* %fp) {
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entry:
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@ -113,7 +128,7 @@ loop_body:
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%0 = call <4 x double> @llvm.maxnum.v4f64(<4 x double> %f, <4 x double> <double 1.0, double 1.0, double 1.0, double 1.0>)
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store <4 x double> %0, <4 x double>* %fp, align 16
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%1 = add i64 %invar_address.dim.0.01, 1
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%2 = icmp eq i64 %1, 2
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%2 = icmp eq i64 %1, 4
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br i1 %2, label %loop_exit, label %loop_body
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loop_exit:
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}
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; CHECK-LABEL: test2v:
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; CHECK: bl fmax
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; CHECK-NOT: mtctr
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; CHECK: bl fmax
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; CHECK-NOT: mtctr
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; CHECK: bl fmax
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; CHECK-NOT: mtctr
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; CHECK: bl fmax
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; CHECK-NOT: bl fmax
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; CHECK: blr
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; QPX-LABEL: test2v:
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; QPX: mtctr
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@ -148,6 +170,9 @@ loop_exit:
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; CHECK-LABEL: test2a:
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; CHECK-NOT: mtctr
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; CHECK: bl fmaxf
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; CHECK-NOT: bl fmaxf
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; CHECK-NOT: mtctr
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; CHECK: blr
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define void @test3(double %f, double* %fp) {
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entry:
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@ -168,6 +193,9 @@ loop_exit:
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; CHECK-LABEL: test3:
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; CHECK-NOT: mtctr
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; CHECK: bl fmin
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; CHECK-NOT: bl fmin
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; CHECK-NOT: mtctr
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; CHECK: blr
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define void @test3a(double %f, double* %fp) {
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entry:
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; CHECK-LABEL: test3a:
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; CHECK-NOT: mtctr
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; CHECK: bl fmin
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; CHECK-NOT: bl fmin
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; CHECK-NOT: mtctr
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; CHECK: blr
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define void @test4(double %f, double* %fp) {
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entry:
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@ -208,6 +239,9 @@ loop_exit:
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; CHECK-LABEL: test4:
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; CHECK-NOT: mtctr
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; CHECK: bl fmax
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; CHECK-NOT: bl fmax
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; CHECK-NOT: mtctr
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; CHECK: blr
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define void @test4a(double %f, double* %fp) {
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entry:
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; CHECK-LABEL: test4a:
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; CHECK-NOT: mtctr
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; CHECK: bl fmax
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; CHECK-NOT: bl fmax
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; CHECK-NOT: mtctr
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; CHECK: blr
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@ -0,0 +1,116 @@
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; RUN: llc < %s -mtriple=powerpc64le-unknown-linux-gnu -verify-machineinstrs -mcpu=pwr8 | FileCheck %s
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; RUN: llc < %s -mtriple=powerpc64le-unknown-linux-gnu -verify-machineinstrs -mcpu=a2q | FileCheck %s
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; Verify that we do NOT generate the mtctr instruction for loop trip counts < 4
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; The latency of the mtctr is only justified if there are more than 4 comparisons that are removed as a result.
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@a = common local_unnamed_addr global i32 0, align 4
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@arr = common local_unnamed_addr global [5 x i32] zeroinitializer, align 4
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; Function Attrs: norecurse nounwind readonly
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define signext i32 @testTripCount2(i32 signext %a) {
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; CHECK-LABEL: testTripCount2:
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; CHECK-NOT: mtctr
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; CHECK: blr
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entry:
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br label %for.body
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for.cond.cleanup: ; preds = %for.body
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ret i32 %add
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for.body: ; preds = %entry, %for.body
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%indvars.iv = phi i64 [ 1, %entry ], [ %indvars.iv.next, %for.body ]
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%Sum.05 = phi i32 [ 0, %entry ], [ %add, %for.body ]
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%arrayidx = getelementptr inbounds [5 x i32], [5 x i32]* @arr, i64 0, i64 %indvars.iv
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%0 = load i32, i32* %arrayidx, align 4
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%add = add nsw i32 %0, %Sum.05
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%indvars.iv.next = add nsw i64 %indvars.iv, -1
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%tobool = icmp eq i64 %indvars.iv, 0
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br i1 %tobool, label %for.cond.cleanup, label %for.body
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}
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; Function Attrs: norecurse nounwind readonly
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define signext i32 @testTripCount3(i32 signext %a) {
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; CHECK-LABEL: testTripCount3:
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; CHECK-NOT: mtctr
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; CHECK: blr
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entry:
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br label %for.body
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for.cond.cleanup: ; preds = %for.body
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ret i32 %add
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for.body: ; preds = %entry, %for.body
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%indvars.iv = phi i64 [ 2, %entry ], [ %indvars.iv.next, %for.body ]
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%Sum.05 = phi i32 [ 0, %entry ], [ %add, %for.body ]
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%arrayidx = getelementptr inbounds [5 x i32], [5 x i32]* @arr, i64 0, i64 %indvars.iv
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%0 = load i32, i32* %arrayidx, align 4
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%add = add nsw i32 %0, %Sum.05
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%indvars.iv.next = add nsw i64 %indvars.iv, -1
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%tobool = icmp eq i64 %indvars.iv, 0
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br i1 %tobool, label %for.cond.cleanup, label %for.body
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}
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; Function Attrs: norecurse nounwind readonly
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define signext i32 @testTripCount4(i32 signext %a) {
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; CHECK-LABEL: testTripCount4:
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; CHECK: mtctr
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; CHECK: bdnz
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entry:
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br label %for.body
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for.cond.cleanup: ; preds = %for.body
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ret i32 %add
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for.body: ; preds = %entry, %for.body
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%indvars.iv = phi i64 [ 3, %entry ], [ %indvars.iv.next, %for.body ]
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%Sum.05 = phi i32 [ 0, %entry ], [ %add, %for.body ]
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%arrayidx = getelementptr inbounds [5 x i32], [5 x i32]* @arr, i64 0, i64 %indvars.iv
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%0 = load i32, i32* %arrayidx, align 4
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%add = add nsw i32 %0, %Sum.05
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%indvars.iv.next = add nsw i64 %indvars.iv, -1
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%tobool = icmp eq i64 %indvars.iv, 0
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br i1 %tobool, label %for.cond.cleanup, label %for.body
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}
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; Function Attrs: norecurse nounwind
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define signext i32 @testTripCount2NonSmallLoop() {
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; CHECK-LABEL: testTripCount2NonSmallLoop:
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; CHECK: mtctr
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; CHECK: blr
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entry:
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%.pre = load i32, i32* @a, align 4
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br label %for.body
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for.body: ; preds = %entry, %if.end
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%0 = phi i32 [ %.pre, %entry ], [ %1, %if.end ]
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%dec4 = phi i32 [ 1, %entry ], [ %dec, %if.end ]
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%b.03 = phi i8 [ 0, %entry ], [ %b.1, %if.end ]
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%tobool1 = icmp eq i32 %0, 0
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br i1 %tobool1, label %if.end, label %if.then
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if.then: ; preds = %for.body
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store i32 2, i32* @a, align 4
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br label %if.end
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if.end: ; preds = %for.body, %if.then
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%1 = phi i32 [ 2, %if.then ], [ 0, %for.body ]
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%b.1 = phi i8 [ 2, %if.then ], [ %b.03, %for.body ]
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%dec = add nsw i32 %dec4, -1
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%tobool = icmp eq i32 %dec4, 0
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br i1 %tobool, label %for.end, label %for.body
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for.end: ; preds = %if.end
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%conv = zext i8 %b.1 to i32
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ret i32 %conv
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}
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