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[CostModel] Fix cast crash 

Don't presume instruction operands while matching reductions.

Bugzilla: https://bugs.llvm.org/show_bug.cgi?id=46430

Differential Revision: https://reviews.llvm.org/D82453
This commit is contained in:
Sam Parker 2020-07-02 12:13:23 +01:00
parent 03828e38c3
commit 0724153bbe
2 changed files with 26 additions and 1 deletions
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4
llvm/lib/Analysis/TargetTransformInfo.cpp
View File

@ -1053,6 +1053,8 @@ static TTI::ReductionKind matchPairwiseReductionAtLevel(Instruction *I,
// Check that the next levels binary operation exists and matches with the // Check that the next levels binary operation exists and matches with the
// current one. // current one.
if (Level + 1 != NumLevels) { if (Level + 1 != NumLevels) {
if (!isa<Instruction>(NextLevelOp))
return TTI::RK_None;
Optional<TTI::ReductionData> NextLevelRD = Optional<TTI::ReductionData> NextLevelRD =
getReductionData(cast<Instruction>(NextLevelOp)); getReductionData(cast<Instruction>(NextLevelOp));
if (!NextLevelRD || !RD->hasSameData(*NextLevelRD)) if (!NextLevelRD || !RD->hasSameData(*NextLevelRD))
@ -1074,7 +1076,7 @@ static TTI::ReductionKind matchPairwiseReductionAtLevel(Instruction *I,
return RD->Kind; return RD->Kind;
// Match next level. // Match next level.
return matchPairwiseReductionAtLevel(cast<Instruction>(NextLevelOp), Level, return matchPairwiseReductionAtLevel(dyn_cast<Instruction>(NextLevelOp), Level,
NumLevels); NumLevels);
} }

23
llvm/test/Transforms/LoopUnroll/X86/pr46430.ll Normal file
View File

@ -0,0 +1,23 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt -mtriple=x86_64-unknown-linux-gnu -loop-unroll -costmodel-reduxcost -S -o - %s | FileCheck %s
define void @g() {
; CHECK-LABEL: @g(
; CHECK-NEXT: entry:
; CHECK-NEXT: br label [[F_EXIT:%.*]]
; CHECK: f.exit:
; CHECK-NEXT: [[RDX_SHUF9_I:%.*]] = shufflevector <4 x i16> <i16 1, i16 0, i16 undef, i16 undef>, <4 x i16> undef, <4 x i32> <i32 1, i32 undef, i32 undef, i32 undef>
; CHECK-NEXT: [[BIN_RDX10_I:%.*]] = xor <4 x i16> <i16 1, i16 0, i16 undef, i16 undef>, [[RDX_SHUF9_I]]
; CHECK-NEXT: [[TMP0:%.*]] = extractelement <4 x i16> [[BIN_RDX10_I]], i32 0
; CHECK-NEXT: br label [[F_EXIT]]
;
entry:
br label %f.exit
f.exit: ; preds = %f.exit, %entry
%rdx.shuf9.i = shufflevector <4 x i16> <i16 1, i16 0, i16 undef, i16 undef>, <4 x i16> undef, <4 x i32> <i32 1, i32 undef, i32 undef, i32 undef>
%bin.rdx10.i = xor <4 x i16> <i16 1, i16 0, i16 undef, i16 undef>, %rdx.shuf9.i
%0 = extractelement <4 x i16> %bin.rdx10.i, i32 0
br label %f.exit
}