forked from OSchip/llvm-project
Add hasSideEffects/mayLoad/mayStore flags to the X86 moffs8/moffs16/moffs32/moffs64 versions of move.
llvm-svn: 189182
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@ -1072,9 +1072,12 @@ def MOV64mi32 : RIi32<0xC7, MRM0m, (outs), (ins i64mem:$dst, i64i32imm:$src),
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[(store i64immSExt32:$src, addr:$dst)], IIC_MOV_MEM>;
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} // SchedRW
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let hasSideEffects = 0 in {
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/// moffs8, moffs16 and moffs32 versions of moves. The immediate is a
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/// 32-bit offset from the PC. These are only valid in x86-32 mode.
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let SchedRW = [WriteALU] in {
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let mayLoad = 1 in {
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def MOV8o8a : Ii32 <0xA0, RawFrm, (outs), (ins offset8:$src),
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"mov{b}\t{$src, %al|al, $src}", [], IIC_MOV_MEM>,
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Requires<[In32BitMode]>;
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@ -1084,6 +1087,8 @@ def MOV16o16a : Ii32 <0xA1, RawFrm, (outs), (ins offset16:$src),
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def MOV32o32a : Ii32 <0xA1, RawFrm, (outs), (ins offset32:$src),
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"mov{l}\t{$src, %eax|eax, $src}", [], IIC_MOV_MEM>,
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Requires<[In32BitMode]>;
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}
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let mayStore = 1 in {
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def MOV8ao8 : Ii32 <0xA2, RawFrm, (outs offset8:$dst), (ins),
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"mov{b}\t{%al, $dst|$dst, al}", [], IIC_MOV_MEM>,
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Requires<[In32BitMode]>;
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@ -1094,9 +1099,11 @@ def MOV32ao32 : Ii32 <0xA3, RawFrm, (outs offset32:$dst), (ins),
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"mov{l}\t{%eax, $dst|$dst, eax}", [], IIC_MOV_MEM>,
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Requires<[In32BitMode]>;
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}
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}
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// These forms all have full 64-bit absolute addresses in their instructions
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// and use the movabs mnemonic to indicate this specific form.
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let mayLoad = 1 in {
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def MOV64o8a : RIi64_NOREX<0xA0, RawFrm, (outs), (ins offset64:$src),
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"movabs{b}\t{$src, %al|al, $src}", []>,
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Requires<[In64BitMode]>;
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@ -1109,7 +1116,9 @@ def MOV64o32a : RIi64_NOREX<0xA1, RawFrm, (outs), (ins offset64:$src),
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def MOV64o64a : RIi64<0xA1, RawFrm, (outs), (ins offset64:$src),
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"movabs{q}\t{$src, %rax|rax, $src}", []>,
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Requires<[In64BitMode]>;
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}
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let mayStore = 1 in {
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def MOV64ao8 : RIi64_NOREX<0xA2, RawFrm, (outs offset64:$dst), (ins),
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"movabs{b}\t{%al, $dst|$dst, al}", []>,
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Requires<[In64BitMode]>;
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@ -1122,6 +1131,8 @@ def MOV64ao32 : RIi64_NOREX<0xA3, RawFrm, (outs offset64:$dst), (ins),
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def MOV64ao64 : RIi64<0xA3, RawFrm, (outs offset64:$dst), (ins),
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"movabs{q}\t{%rax, $dst|$dst, rax}", []>,
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Requires<[In64BitMode]>;
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}
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} // hasSideEffects = 0
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let isCodeGenOnly = 1, hasSideEffects = 0, SchedRW = [WriteMove] in {
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def MOV8rr_REV : I<0x8A, MRMSrcReg, (outs GR8:$dst), (ins GR8:$src),
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