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[PGO][PGSO] Add profile guided size optimization tests to X86 ISel Lowering.

This commit is contained in:
Hiroshi Yamauchi 2020-07-08 14:00:15 -07:00
parent 8372d50508
commit 06fc125d8c
2 changed files with 90 additions and 0 deletions
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35
llvm/test/CodeGen/X86/avx-vperm2x128.ll
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@ -394,6 +394,15 @@ define <4 x double> @shuffle_v4f64_zz23_optsize(<4 x double> %a) optsize {
%s = shufflevector <4 x double> %a, <4 x double> <double 0.0, double 0.0, double undef, double undef>, <4 x i32> <i32 4, i32 5, i32 2, i32 3> %s = shufflevector <4 x double> %a, <4 x double> <double 0.0, double 0.0, double undef, double undef>, <4 x i32> <i32 4, i32 5, i32 2, i32 3>
ret <4 x double> %s ret <4 x double> %s
} }
define <4 x double> @shuffle_v4f64_zz23_pgso(<4 x double> %a) !prof !14 {
; ALL-LABEL: shuffle_v4f64_zz23_pgso:
; ALL: # %bb.0:
; ALL-NEXT: vxorps %xmm1, %xmm1, %xmm1
; ALL-NEXT: vblendps {{.*#+}} ymm0 = ymm1[0,1,2,3],ymm0[4,5,6,7]
; ALL-NEXT: retq
%s = shufflevector <4 x double> %a, <4 x double> <double 0.0, double 0.0, double undef, double undef>, <4 x i32> <i32 4, i32 5, i32 2, i32 3>
ret <4 x double> %s
}
define <4 x double> @shuffle_v4f64_zz45(<4 x double> %a) { define <4 x double> @shuffle_v4f64_zz45(<4 x double> %a) {
; ALL-LABEL: shuffle_v4f64_zz45: ; ALL-LABEL: shuffle_v4f64_zz45:
@ -429,6 +438,15 @@ define <4 x double> @shuffle_v4f64_zz67_optsize(<4 x double> %a) optsize {
%s = shufflevector <4 x double> <double 0.0, double 0.0, double undef, double undef>, <4 x double> %a, <4 x i32> <i32 0, i32 1, i32 6, i32 7> %s = shufflevector <4 x double> <double 0.0, double 0.0, double undef, double undef>, <4 x double> %a, <4 x i32> <i32 0, i32 1, i32 6, i32 7>
ret <4 x double> %s ret <4 x double> %s
} }
define <4 x double> @shuffle_v4f64_zz67_pgso(<4 x double> %a) !prof !14 {
; ALL-LABEL: shuffle_v4f64_zz67_pgso:
; ALL: # %bb.0:
; ALL-NEXT: vxorps %xmm1, %xmm1, %xmm1
; ALL-NEXT: vblendps {{.*#+}} ymm0 = ymm1[0,1,2,3],ymm0[4,5,6,7]
; ALL-NEXT: retq
%s = shufflevector <4 x double> <double 0.0, double 0.0, double undef, double undef>, <4 x double> %a, <4 x i32> <i32 0, i32 1, i32 6, i32 7>
ret <4 x double> %s
}
define <4 x double> @shuffle_v4f64_01zz(<4 x double> %a) { define <4 x double> @shuffle_v4f64_01zz(<4 x double> %a) {
; ALL-LABEL: shuffle_v4f64_01zz: ; ALL-LABEL: shuffle_v4f64_01zz:
@ -685,3 +703,20 @@ entry:
%res = add <8 x i32> %shuffle, <i32 1, i32 2, i32 3, i32 4, i32 1, i32 2, i32 3, i32 4> %res = add <8 x i32> %shuffle, <i32 1, i32 2, i32 3, i32 4, i32 1, i32 2, i32 3, i32 4>
ret <8 x i32> %res ret <8 x i32> %res
} }
!llvm.module.flags = !{!0}
!0 = !{i32 1, !"ProfileSummary", !1}
!1 = !{!2, !3, !4, !5, !6, !7, !8, !9}
!2 = !{!"ProfileFormat", !"InstrProf"}
!3 = !{!"TotalCount", i64 10000}
!4 = !{!"MaxCount", i64 10}
!5 = !{!"MaxInternalCount", i64 1}
!6 = !{!"MaxFunctionCount", i64 1000}
!7 = !{!"NumCounts", i64 3}
!8 = !{!"NumFunctions", i64 3}
!9 = !{!"DetailedSummary", !10}
!10 = !{!11, !12, !13}
!11 = !{i32 10000, i64 100, i32 1}
!12 = !{i32 999000, i64 100, i32 1}
!13 = !{i32 999999, i64 1, i32 2}
!14 = !{!"function_entry_count", i64 0}

55
llvm/test/CodeGen/X86/phaddsub-extract.ll
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@ -2094,6 +2094,44 @@ define i32 @hadd32_4_optsize(<4 x i32> %x225) optsize {
ret i32 %x230 ret i32 %x230
} }
define i32 @hadd32_4_pgso(<4 x i32> %x225) !prof !14 {
; SSE3-SLOW-LABEL: hadd32_4_pgso:
; SSE3-SLOW: # %bb.0:
; SSE3-SLOW-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
; SSE3-SLOW-NEXT: paddd %xmm0, %xmm1
; SSE3-SLOW-NEXT: phaddd %xmm1, %xmm1
; SSE3-SLOW-NEXT: movd %xmm1, %eax
; SSE3-SLOW-NEXT: retq
;
; SSE3-FAST-LABEL: hadd32_4_pgso:
; SSE3-FAST: # %bb.0:
; SSE3-FAST-NEXT: phaddd %xmm0, %xmm0
; SSE3-FAST-NEXT: phaddd %xmm0, %xmm0
; SSE3-FAST-NEXT: movd %xmm0, %eax
; SSE3-FAST-NEXT: retq
;
; AVX-SLOW-LABEL: hadd32_4_pgso:
; AVX-SLOW: # %bb.0:
; AVX-SLOW-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
; AVX-SLOW-NEXT: vpaddd %xmm1, %xmm0, %xmm0
; AVX-SLOW-NEXT: vphaddd %xmm0, %xmm0, %xmm0
; AVX-SLOW-NEXT: vmovd %xmm0, %eax
; AVX-SLOW-NEXT: retq
;
; AVX-FAST-LABEL: hadd32_4_pgso:
; AVX-FAST: # %bb.0:
; AVX-FAST-NEXT: vphaddd %xmm0, %xmm0, %xmm0
; AVX-FAST-NEXT: vphaddd %xmm0, %xmm0, %xmm0
; AVX-FAST-NEXT: vmovd %xmm0, %eax
; AVX-FAST-NEXT: retq
%x226 = shufflevector <4 x i32> %x225, <4 x i32> undef, <4 x i32> <i32 2, i32 3, i32 undef, i32 undef>
%x227 = add <4 x i32> %x225, %x226
%x228 = shufflevector <4 x i32> %x227, <4 x i32> undef, <4 x i32> <i32 1, i32 undef, i32 undef, i32 undef>
%x229 = add <4 x i32> %x227, %x228
%x230 = extractelement <4 x i32> %x229, i32 0
ret i32 %x230
}
define i32 @hadd32_8_optsize(<8 x i32> %x225) optsize { define i32 @hadd32_8_optsize(<8 x i32> %x225) optsize {
; SSE3-LABEL: hadd32_8_optsize: ; SSE3-LABEL: hadd32_8_optsize:
; SSE3: # %bb.0: ; SSE3: # %bb.0:
@ -2141,3 +2179,20 @@ define i32 @hadd32_16_optsize(<16 x i32> %x225) optsize {
%x230 = extractelement <16 x i32> %x229, i32 0 %x230 = extractelement <16 x i32> %x229, i32 0
ret i32 %x230 ret i32 %x230
} }
!llvm.module.flags = !{!0}
!0 = !{i32 1, !"ProfileSummary", !1}
!1 = !{!2, !3, !4, !5, !6, !7, !8, !9}
!2 = !{!"ProfileFormat", !"InstrProf"}
!3 = !{!"TotalCount", i64 10000}
!4 = !{!"MaxCount", i64 10}
!5 = !{!"MaxInternalCount", i64 1}
!6 = !{!"MaxFunctionCount", i64 1000}
!7 = !{!"NumCounts", i64 3}
!8 = !{!"NumFunctions", i64 3}
!9 = !{!"DetailedSummary", !10}
!10 = !{!11, !12, !13}
!11 = !{i32 10000, i64 100, i32 1}
!12 = !{i32 999000, i64 100, i32 1}
!13 = !{i32 999999, i64 1, i32 2}
!14 = !{!"function_entry_count", i64 0}