forked from OSchip/llvm-project
[llvm-mca] Reformat a few lines (fix spacing). NFC.
llvm-svn: 340065
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5bce7f8b8f
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@ -423,9 +423,7 @@ public:
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bool isValid() const {
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return Data.first != INVALID_IID && Data.second != nullptr;
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}
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bool operator==(const WriteRef &Other) const {
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return Data == Other.Data;
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}
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bool operator==(const WriteRef &Other) const { return Data == Other.Data; }
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#ifndef NDEBUG
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void dump() const;
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@ -313,7 +313,7 @@ void Scheduler::promoteToReadySet(SmallVectorImpl<InstRef> &Ready) {
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// Scan the set of waiting instructions and promote them to the
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// ready queue if operands are all ready.
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unsigned RemovedElements = 0;
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for (auto I = WaitSet.begin(), E = WaitSet.end(); I != E; ) {
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for (auto I = WaitSet.begin(), E = WaitSet.end(); I != E;) {
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InstRef &IR = *I;
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if (!IR.isValid())
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break;
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@ -375,7 +375,7 @@ InstRef Scheduler::select() {
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return InstRef();
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// We found an instruction to issue.
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InstRef IR = ReadySet[QueueIndex];
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std::swap(ReadySet[QueueIndex], ReadySet[ReadySet.size() - 1]);
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ReadySet.pop_back();
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@ -392,7 +392,7 @@ void Scheduler::updatePendingQueue(SmallVectorImpl<InstRef> &Ready) {
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void Scheduler::updateIssuedSet(SmallVectorImpl<InstRef> &Executed) {
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unsigned RemovedElements = 0;
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for (auto I = IssuedSet.begin(), E = IssuedSet.end(); I != E; ) {
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for (auto I = IssuedSet.begin(), E = IssuedSet.end(); I != E;) {
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InstRef &IR = *I;
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if (!IR.isValid())
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break;
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@ -313,7 +313,7 @@ public:
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void releaseBuffers(llvm::ArrayRef<uint64_t> Buffers);
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// Reserve a processor resource. A reserved resource is not available for
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// instruction issue until it is released.
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// instruction issue until it is released.
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void reserveResource(uint64_t ResourceID);
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// Release a previously reserved processor resource.
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