[AArch64] Add support for NEON scalar signed saturating accumulated of unsigned

value and unsigned saturating accumulate of signed value instructions.

llvm-svn: 192801
This commit is contained in:
Chad Rosier 2013-10-16 16:09:16 +00:00
parent 178b1cefc7
commit 069b90463d
3 changed files with 70 additions and 0 deletions

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@ -862,4 +862,12 @@ def SCALAR_SQABS : SInst<"vqabs", "ss", "ScSsSiSl">;
//////////////////////////////////////////////////////////////////////////////// ////////////////////////////////////////////////////////////////////////////////
// Scalar Signed Saturating Negate // Scalar Signed Saturating Negate
def SCALAR_SQNEG : SInst<"vqneg", "ss", "ScSsSiSl">; def SCALAR_SQNEG : SInst<"vqneg", "ss", "ScSsSiSl">;
////////////////////////////////////////////////////////////////////////////////
// Scalar Signed Saturating Accumulated of Unsigned Value
def SCALAR_SUQADD : SInst<"vuqadd", "sss", "ScSsSiSl">;
////////////////////////////////////////////////////////////////////////////////
// Scalar Unsigned Saturating Accumulated of Unsigned Value
def SCALAR_USQADD : SInst<"vsqadd", "sss", "SUcSUsSUiSUl">;
} }

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@ -2088,6 +2088,20 @@ static Value *EmitAArch64ScalarBuiltinExpr(CodeGenFunction &CGF,
case AArch64::BI__builtin_neon_vqnegd_s64: case AArch64::BI__builtin_neon_vqnegd_s64:
Int = Intrinsic::arm_neon_vqneg; Int = Intrinsic::arm_neon_vqneg;
s = "vqneg"; OverloadInt = true; break; s = "vqneg"; OverloadInt = true; break;
// Scalar Signed Saturating Accumulated of Unsigned Value
case AArch64::BI__builtin_neon_vuqaddb_s8:
case AArch64::BI__builtin_neon_vuqaddh_s16:
case AArch64::BI__builtin_neon_vuqadds_s32:
case AArch64::BI__builtin_neon_vuqaddd_s64:
Int = Intrinsic::aarch64_neon_vuqadd;
s = "vuqadd"; OverloadInt = true; break;
// Scalar Unsigned Saturating Accumulated of Unsigned Value
case AArch64::BI__builtin_neon_vsqaddb_u8:
case AArch64::BI__builtin_neon_vsqaddh_u16:
case AArch64::BI__builtin_neon_vsqadds_u32:
case AArch64::BI__builtin_neon_vsqaddd_u64:
Int = Intrinsic::aarch64_neon_vsqadd;
s = "vsqadd"; OverloadInt = true; break;
} }
if (!Int) if (!Int)

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@ -7165,3 +7165,51 @@ int64_t test_vqnegd_s64(int64_t a) {
// CHECK: sqneg {{d[0-9]+}}, {{d[0-9]+}} // CHECK: sqneg {{d[0-9]+}}, {{d[0-9]+}}
return (int64_t)vqnegd_s64(a); return (int64_t)vqnegd_s64(a);
} }
int8_t test_vuqaddb_s8(int8_t a, int8_t b) {
// CHECK: test_vuqaddb_s8
// CHECK: suqadd {{b[0-9]+}}, {{b[0-9]+}}
return (int8_t)vuqaddb_s8(a, b);
}
int16_t test_vuqaddh_s16(int16_t a, int16_t b) {
// CHECK: test_vuqaddh_s16
// CHECK: suqadd {{h[0-9]+}}, {{h[0-9]+}}
return (int16_t)vuqaddh_s16(a, b);
}
int32_t test_vuqadds_s32(int32_t a, int32_t b) {
// CHECK: test_vuqadds_s32
// CHECK: suqadd {{s[0-9]+}}, {{s[0-9]+}}
return (int32_t)vuqadds_s32(a, b);
}
int64_t test_vuqaddd_s64(int64_t a, int64_t b) {
// CHECK: test_vuqaddd_s64
// CHECK: suqadd {{d[0-9]+}}, {{d[0-9]+}}
return (int64_t)vuqaddd_s64(a, b);
}
uint8_t test_vsqaddb_u8(uint8_t a, uint8_t b) {
// CHECK: test_vsqaddb_u8
// CHECK: usqadd {{b[0-9]+}}, {{b[0-9]+}}
return (uint8_t)vsqaddb_u8(a, b);
}
uint16_t test_vsqaddh_u16(uint16_t a, uint16_t b) {
// CHECK: test_vsqaddh_u16
// CHECK: usqadd {{h[0-9]+}}, {{h[0-9]+}}
return (uint16_t)vsqaddh_u16(a, b);
}
uint32_t test_vsqadds_u32(uint32_t a, uint32_t b) {
// CHECK: test_vsqadds_u32
// CHECK: usqadd {{s[0-9]+}}, {{s[0-9]+}}
return (uint32_t)vsqadds_u32(a, b);
}
uint64_t test_vsqaddd_u64(uint64_t a, uint64_t b) {
// CHECK: test_vsqaddd_u64
// CHECK: usqadd {{d[0-9]+}}, {{d[0-9]+}}
return (uint64_t)vsqaddd_u64(a, b);
}