forked from OSchip/llvm-project
.set pc relative displacement bug: label should be moved down one instruction
to just before the add r1, pc: Before: .set PCRELV0, (LJTI1_0_0-(LPCRELL0+4)) LPCRELL0: mov r1, #PCRELV0 add r1, pc Now: .set PCRELV0, (LJTI1_0_0-(LPCRELL0+4)) mov r1, #PCRELV0 LPCRELL0: add r1, pc llvm-svn: 33744
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@ -480,17 +480,17 @@ let usesCustomDAGSchedInserter = 1 in // Expanded by the scheduler.
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// assembler.
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def tLEApcrel : TIx2<(ops GPR:$dst, i32imm:$label),
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!strconcat(!strconcat(".set PCRELV${:uid}, ($label-(",
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"${:private}PCRELL${:uid}+4))\n"),
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!strconcat("${:private}PCRELL${:uid}:\n\t",
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"mov $dst, #PCRELV${:uid}\n\tadd $dst, pc")),
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"${:private}PCRELL${:uid}+6))\n"),
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!strconcat("\tmov $dst, #PCRELV${:uid}\n",
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"${:private}PCRELL${:uid}:\n\tadd $dst, pc")),
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[]>;
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def tLEApcrelJT : TIx2<(ops GPR:$dst, i32imm:$label, i32imm:$id),
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!strconcat(!strconcat(".set PCRELV${:uid}, (${label}_${id:no_hash}-(",
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"${:private}PCRELL${:uid}+4))\n"),
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!strconcat("${:private}PCRELL${:uid}:\n\t",
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"mov $dst, #PCRELV${:uid}\n\tadd $dst, pc")),
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[]>;
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!strconcat("\tmov $dst, #PCRELV${:uid}\n",
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"${:private}PCRELL${:uid}:\n\tadd $dst, pc")),
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[]>;
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//===----------------------------------------------------------------------===//
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// Non-Instruction Patterns
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