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[CSKY] Add CSKYConstantIslands Pass to lift or duplicate constant pool entry 

Loading constants inline is expensive on CSKY and it's in general better
to place the constant nearby in code space and then it can be loaded with a
simple 16/32 bit load instruction like lrw.

It needs lift or duplicates constant pool entry to make constant nearby so that lrw instruction can reach.
This commit is contained in:
Zi Xuan Wu 2022-01-11 16:13:21 +08:00
parent 98d51c2542
commit 065e0324e5
11 changed files with 1633 additions and 135 deletions
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1
llvm/lib/Target/CSKY/CMakeLists.txt
View File

@ -17,6 +17,7 @@ add_public_tablegen_target(CSKYCommonTableGen)
add_llvm_target(CSKYCodeGen add_llvm_target(CSKYCodeGen
CSKYAsmPrinter.cpp CSKYAsmPrinter.cpp
CSKYConstantIslandPass.cpp
CSKYConstantPoolValue.cpp CSKYConstantPoolValue.cpp
CSKYFrameLowering.cpp CSKYFrameLowering.cpp
CSKYInstrInfo.cpp CSKYInstrInfo.cpp

3
llvm/lib/Target/CSKY/CSKY.h
View File

@ -21,6 +21,9 @@ class CSKYTargetMachine;
class FunctionPass; class FunctionPass;
FunctionPass *createCSKYISelDag(CSKYTargetMachine &TM); FunctionPass *createCSKYISelDag(CSKYTargetMachine &TM);
FunctionPass *createCSKYConstantIslandPass();
void initializeCSKYConstantIslandsPass(PassRegistry &);
} // namespace llvm } // namespace llvm

43
llvm/lib/Target/CSKY/CSKYAsmPrinter.cpp
View File

@ -39,6 +39,7 @@ CSKYAsmPrinter::CSKYAsmPrinter(llvm::TargetMachine &TM,
: AsmPrinter(TM, std::move(Streamer)), MCInstLowering(OutContext, *this) {} : AsmPrinter(TM, std::move(Streamer)), MCInstLowering(OutContext, *this) {}
bool CSKYAsmPrinter::runOnMachineFunction(MachineFunction &MF) { bool CSKYAsmPrinter::runOnMachineFunction(MachineFunction &MF) {
MCP = MF.getConstantPool();
Subtarget = &MF.getSubtarget<CSKYSubtarget>(); Subtarget = &MF.getSubtarget<CSKYSubtarget>();
return AsmPrinter::runOnMachineFunction(MF); return AsmPrinter::runOnMachineFunction(MF);
} }
@ -57,11 +58,53 @@ void CSKYAsmPrinter::EmitToStreamer(MCStreamer &S, const MCInst &Inst) {
// instructions) auto-generated. // instructions) auto-generated.
#include "CSKYGenMCPseudoLowering.inc" #include "CSKYGenMCPseudoLowering.inc"
void CSKYAsmPrinter::emitCustomConstantPool(const MachineInstr *MI) {
// This instruction represents a floating constant pool in the function.
// The first operand is the ID# for this instruction, the second is the
// index into the MachineConstantPool that this is, the third is the size
// in bytes of this constant pool entry.
// The required alignment is specified on the basic block holding this MI.
unsigned LabelId = (unsigned)MI->getOperand(0).getImm();
unsigned CPIdx = (unsigned)MI->getOperand(1).getIndex();
// If this is the first entry of the pool, mark it.
if (!InConstantPool) {
OutStreamer->emitValueToAlignment(4);
InConstantPool = true;
}
OutStreamer->emitLabel(GetCPISymbol(LabelId));
const MachineConstantPoolEntry &MCPE = MCP->getConstants()[CPIdx];
if (MCPE.isMachineConstantPoolEntry())
emitMachineConstantPoolValue(MCPE.Val.MachineCPVal);
else
emitGlobalConstant(MF->getDataLayout(), MCPE.Val.ConstVal);
return;
}
void CSKYAsmPrinter::emitFunctionBodyEnd() {
// Make sure to terminate any constant pools that were at the end
// of the function.
if (!InConstantPool)
return;
InConstantPool = false;
}
void CSKYAsmPrinter::emitInstruction(const MachineInstr *MI) { void CSKYAsmPrinter::emitInstruction(const MachineInstr *MI) {
// Do any auto-generated pseudo lowerings. // Do any auto-generated pseudo lowerings.
if (emitPseudoExpansionLowering(*OutStreamer, MI)) if (emitPseudoExpansionLowering(*OutStreamer, MI))
return; return;
// If we just ended a constant pool, mark it as such.
if (InConstantPool && MI->getOpcode() != CSKY::CONSTPOOL_ENTRY) {
InConstantPool = false;
}
if (MI->getOpcode() == CSKY::CONSTPOOL_ENTRY)
return emitCustomConstantPool(MI);
MCInst TmpInst; MCInst TmpInst;
MCInstLowering.Lower(MI, TmpInst); MCInstLowering.Lower(MI, TmpInst);
EmitToStreamer(*OutStreamer, TmpInst); EmitToStreamer(*OutStreamer, TmpInst);

13
llvm/lib/Target/CSKY/CSKYAsmPrinter.h
View File

@ -20,6 +20,14 @@ class LLVM_LIBRARY_VISIBILITY CSKYAsmPrinter : public AsmPrinter {
const CSKYSubtarget *Subtarget; const CSKYSubtarget *Subtarget;
bool InConstantPool = false;
/// Keep a pointer to constantpool entries of the current
/// MachineFunction.
MachineConstantPool *MCP;
void emitCustomConstantPool(const MachineInstr *MI);
public: public:
explicit CSKYAsmPrinter(TargetMachine &TM, explicit CSKYAsmPrinter(TargetMachine &TM,
std::unique_ptr<MCStreamer> Streamer); std::unique_ptr<MCStreamer> Streamer);
@ -35,9 +43,14 @@ public:
void emitMachineConstantPoolValue(MachineConstantPoolValue *MCPV) override; void emitMachineConstantPoolValue(MachineConstantPoolValue *MCPV) override;
void emitFunctionBodyEnd() override;
void emitInstruction(const MachineInstr *MI) override; void emitInstruction(const MachineInstr *MI) override;
bool runOnMachineFunction(MachineFunction &MF) override; bool runOnMachineFunction(MachineFunction &MF) override;
// we emit constant pools customly!
void emitConstantPool() override{};
}; };
} // end namespace llvm } // end namespace llvm

1371
llvm/lib/Target/CSKY/CSKYConstantIslandPass.cpp Normal file
View File

File diff suppressed because it is too large Load Diff

19
llvm/lib/Target/CSKY/CSKYInstrInfo.cpp
View File

@ -537,3 +537,22 @@ Register CSKYInstrInfo::getGlobalBaseReg(MachineFunction &MF) const {
CFI->setGlobalBaseReg(GlobalBaseReg); CFI->setGlobalBaseReg(GlobalBaseReg);
return GlobalBaseReg; return GlobalBaseReg;
} }
unsigned CSKYInstrInfo::getInstSizeInBytes(const MachineInstr &MI) const {
switch (MI.getOpcode()) {
default:
return MI.getDesc().getSize();
case CSKY::CONSTPOOL_ENTRY:
return MI.getOperand(2).getImm();
case CSKY::SPILL_CARRY:
case CSKY::RESTORE_CARRY:
case CSKY::PseudoTLSLA32:
return 8;
case TargetOpcode::INLINEASM_BR:
case TargetOpcode::INLINEASM: {
const MachineFunction *MF = MI.getParent()->getParent();
const char *AsmStr = MI.getOperand(0).getSymbolName();
return getInlineAsmLength(AsmStr, *MF->getTarget().getMCAsmInfo());
}
}
}

2
llvm/lib/Target/CSKY/CSKYInstrInfo.h
View File

@ -68,6 +68,8 @@ public:
MachineBasicBlock *getBranchDestBlock(const MachineInstr &MI) const override; MachineBasicBlock *getBranchDestBlock(const MachineInstr &MI) const override;
unsigned getInstSizeInBytes(const MachineInstr &MI) const override;
Register getGlobalBaseReg(MachineFunction &MF) const; Register getGlobalBaseReg(MachineFunction &MF) const;
// Materializes the given integer Val into DstReg. // Materializes the given integer Val into DstReg.

8
llvm/lib/Target/CSKY/CSKYTargetMachine.cpp
View File

@ -23,6 +23,9 @@ using namespace llvm;
extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeCSKYTarget() { extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeCSKYTarget() {
RegisterTargetMachine<CSKYTargetMachine> X(getTheCSKYTarget()); RegisterTargetMachine<CSKYTargetMachine> X(getTheCSKYTarget());
PassRegistry *Registry = PassRegistry::getPassRegistry();
initializeCSKYConstantIslandsPass(*Registry);
} }
static std::string computeDataLayout(const Triple &TT) { static std::string computeDataLayout(const Triple &TT) {
@ -92,6 +95,7 @@ public:
} }
bool addInstSelector() override; bool addInstSelector() override;
void addPreEmitPass() override;
}; };
} // namespace } // namespace
@ -105,3 +109,7 @@ bool CSKYPassConfig::addInstSelector() {
return false; return false;
} }
void CSKYPassConfig::addPreEmitPass() {
addPass(createCSKYConstantIslandPass());
}

200
llvm/test/CodeGen/CSKY/br.ll
View File

@ -45,11 +45,11 @@ label2:
define i32 @brR0_eq(i32 %x) { define i32 @brR0_eq(i32 %x) {
; CHECK-LABEL: brR0_eq: ; CHECK-LABEL: brR0_eq:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: bez32 a0, .LBB2_1 ; CHECK-NEXT: bez32 a0, .LBB2_2
; CHECK-NEXT: # %bb.2: # %label2 ; CHECK-NEXT: # %bb.1: # %label2
; CHECK-NEXT: movi16 a0, 0 ; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: rts16 ; CHECK-NEXT: rts16
; CHECK-NEXT: .LBB2_1: # %label1 ; CHECK-NEXT: .LBB2_2: # %label1
; CHECK-NEXT: movi16 a0, 1 ; CHECK-NEXT: movi16 a0, 1
; CHECK-NEXT: rts16 ; CHECK-NEXT: rts16
entry: entry:
@ -531,11 +531,11 @@ define i32 @brR0_slt(i32 %x) {
; CHECK-NEXT: movih32 a1, 65535 ; CHECK-NEXT: movih32 a1, 65535
; CHECK-NEXT: ori32 a1, a1, 65535 ; CHECK-NEXT: ori32 a1, a1, 65535
; CHECK-NEXT: cmplt16 a1, a0 ; CHECK-NEXT: cmplt16 a1, a0
; CHECK-NEXT: bf32 .LBB24_1 ; CHECK-NEXT: bf32 .LBB24_2
; CHECK-NEXT: # %bb.2: # %label2 ; CHECK-NEXT: # %bb.1: # %label2
; CHECK-NEXT: movi16 a0, 0 ; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: rts16 ; CHECK-NEXT: rts16
; CHECK-NEXT: .LBB24_1: # %label1 ; CHECK-NEXT: .LBB24_2: # %label1
; CHECK-NEXT: movi16 a0, 1 ; CHECK-NEXT: movi16 a0, 1
; CHECK-NEXT: rts16 ; CHECK-NEXT: rts16
; CHECK-UGTXT: icmpu32 a0, a1, a0 ; CHECK-UGTXT: icmpu32 a0, a1, a0
@ -689,12 +689,12 @@ define i64 @brRI_i64_eq(i64 %x) {
; CHECK-LABEL: brRI_i64_eq: ; CHECK-LABEL: brRI_i64_eq:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: or16 a0, a1 ; CHECK-NEXT: or16 a0, a1
; CHECK-NEXT: bez32 a0, .LBB31_1 ; CHECK-NEXT: bez32 a0, .LBB31_2
; CHECK-NEXT: # %bb.2: # %label2 ; CHECK-NEXT: # %bb.1: # %label2
; CHECK-NEXT: movi16 a0, 0 ; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: movi16 a1, 0 ; CHECK-NEXT: movi16 a1, 0
; CHECK-NEXT: rts16 ; CHECK-NEXT: rts16
; CHECK-NEXT: .LBB31_1: # %label1 ; CHECK-NEXT: .LBB31_2: # %label1
; CHECK-NEXT: movi16 a0, 1 ; CHECK-NEXT: movi16 a0, 1
; CHECK-NEXT: movi16 a1, 0 ; CHECK-NEXT: movi16 a1, 0
; CHECK-NEXT: rts16 ; CHECK-NEXT: rts16
@ -803,13 +803,13 @@ define i64 @brRR_i64_ugt(i64 %x, i64 %y) {
; CHECK-NEXT: btsti32 a2, 0 ; CHECK-NEXT: btsti32 a2, 0
; CHECK-NEXT: movf32 a1, a0 ; CHECK-NEXT: movf32 a1, a0
; CHECK-NEXT: btsti32 a1, 0 ; CHECK-NEXT: btsti32 a1, 0
; CHECK-NEXT: bt32 .LBB35_3 ; CHECK-NEXT: bt32 .LBB35_2
; CHECK-NEXT: # %bb.1: # %label1 ; CHECK-NEXT: # %bb.1: # %label1
; CHECK-NEXT: movi16 a0, 1 ; CHECK-NEXT: movi16 a0, 1
; CHECK-NEXT: br32 .LBB35_2 ; CHECK-NEXT: br32 .LBB35_3
; CHECK-NEXT: .LBB35_3: # %label2 ; CHECK-NEXT: .LBB35_2: # %label2
; CHECK-NEXT: movi16 a0, 0 ; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: .LBB35_2: # %label1 ; CHECK-NEXT: .LBB35_3: # %label1
; CHECK-NEXT: movi16 a1, 0 ; CHECK-NEXT: movi16 a1, 0
; CHECK-NEXT: addi16 sp, sp, 16 ; CHECK-NEXT: addi16 sp, sp, 16
; CHECK-NEXT: rts16 ; CHECK-NEXT: rts16
@ -840,13 +840,13 @@ define i64 @brRI_i64_ugt(i64 %x) {
; CHECK-NEXT: btsti32 a2, 0 ; CHECK-NEXT: btsti32 a2, 0
; CHECK-NEXT: movf32 a1, a0 ; CHECK-NEXT: movf32 a1, a0
; CHECK-NEXT: btsti32 a1, 0 ; CHECK-NEXT: btsti32 a1, 0
; CHECK-NEXT: bt32 .LBB36_3 ; CHECK-NEXT: bt32 .LBB36_2
; CHECK-NEXT: # %bb.1: # %label1 ; CHECK-NEXT: # %bb.1: # %label1
; CHECK-NEXT: movi16 a0, 1 ; CHECK-NEXT: movi16 a0, 1
; CHECK-NEXT: br32 .LBB36_2 ; CHECK-NEXT: br32 .LBB36_3
; CHECK-NEXT: .LBB36_3: # %label2 ; CHECK-NEXT: .LBB36_2: # %label2
; CHECK-NEXT: movi16 a0, 0 ; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: .LBB36_2: # %label1 ; CHECK-NEXT: .LBB36_3: # %label1
; CHECK-NEXT: movi16 a1, 0 ; CHECK-NEXT: movi16 a1, 0
; CHECK-NEXT: addi16 sp, sp, 8 ; CHECK-NEXT: addi16 sp, sp, 8
; CHECK-NEXT: rts16 ; CHECK-NEXT: rts16
@ -903,13 +903,13 @@ define i64 @brRR_i64_uge(i64 %x, i64 %y) {
; CHECK-NEXT: btsti32 a2, 0 ; CHECK-NEXT: btsti32 a2, 0
; CHECK-NEXT: movf32 a1, a0 ; CHECK-NEXT: movf32 a1, a0
; CHECK-NEXT: btsti32 a1, 0 ; CHECK-NEXT: btsti32 a1, 0
; CHECK-NEXT: bt32 .LBB38_3 ; CHECK-NEXT: bt32 .LBB38_2
; CHECK-NEXT: # %bb.1: # %label1 ; CHECK-NEXT: # %bb.1: # %label1
; CHECK-NEXT: movi16 a0, 1 ; CHECK-NEXT: movi16 a0, 1
; CHECK-NEXT: br32 .LBB38_2 ; CHECK-NEXT: br32 .LBB38_3
; CHECK-NEXT: .LBB38_3: # %label2 ; CHECK-NEXT: .LBB38_2: # %label2
; CHECK-NEXT: movi16 a0, 0 ; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: .LBB38_2: # %label1 ; CHECK-NEXT: .LBB38_3: # %label1
; CHECK-NEXT: movi16 a1, 0 ; CHECK-NEXT: movi16 a1, 0
; CHECK-NEXT: addi16 sp, sp, 8 ; CHECK-NEXT: addi16 sp, sp, 8
; CHECK-NEXT: rts16 ; CHECK-NEXT: rts16
@ -940,13 +940,13 @@ define i64 @brRI_i64_uge(i64 %x) {
; CHECK-NEXT: btsti32 a2, 0 ; CHECK-NEXT: btsti32 a2, 0
; CHECK-NEXT: movf32 a1, a0 ; CHECK-NEXT: movf32 a1, a0
; CHECK-NEXT: btsti32 a1, 0 ; CHECK-NEXT: btsti32 a1, 0
; CHECK-NEXT: bt32 .LBB39_3 ; CHECK-NEXT: bt32 .LBB39_2
; CHECK-NEXT: # %bb.1: # %label1 ; CHECK-NEXT: # %bb.1: # %label1
; CHECK-NEXT: movi16 a0, 1 ; CHECK-NEXT: movi16 a0, 1
; CHECK-NEXT: br32 .LBB39_2 ; CHECK-NEXT: br32 .LBB39_3
; CHECK-NEXT: .LBB39_3: # %label2 ; CHECK-NEXT: .LBB39_2: # %label2
; CHECK-NEXT: movi16 a0, 0 ; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: .LBB39_2: # %label1 ; CHECK-NEXT: .LBB39_3: # %label1
; CHECK-NEXT: movi16 a1, 0 ; CHECK-NEXT: movi16 a1, 0
; CHECK-NEXT: addi16 sp, sp, 8 ; CHECK-NEXT: addi16 sp, sp, 8
; CHECK-NEXT: rts16 ; CHECK-NEXT: rts16
@ -987,13 +987,13 @@ define i64 @brRR_i64_ult(i64 %x, i64 %y) {
; CHECK-NEXT: btsti32 a2, 0 ; CHECK-NEXT: btsti32 a2, 0
; CHECK-NEXT: movf32 a1, a0 ; CHECK-NEXT: movf32 a1, a0
; CHECK-NEXT: btsti32 a1, 0 ; CHECK-NEXT: btsti32 a1, 0
; CHECK-NEXT: bt32 .LBB40_3 ; CHECK-NEXT: bt32 .LBB40_2
; CHECK-NEXT: # %bb.1: # %label1 ; CHECK-NEXT: # %bb.1: # %label1
; CHECK-NEXT: movi16 a0, 1 ; CHECK-NEXT: movi16 a0, 1
; CHECK-NEXT: br32 .LBB40_2 ; CHECK-NEXT: br32 .LBB40_3
; CHECK-NEXT: .LBB40_3: # %label2 ; CHECK-NEXT: .LBB40_2: # %label2
; CHECK-NEXT: movi16 a0, 0 ; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: .LBB40_2: # %label1 ; CHECK-NEXT: .LBB40_3: # %label1
; CHECK-NEXT: movi16 a1, 0 ; CHECK-NEXT: movi16 a1, 0
; CHECK-NEXT: addi16 sp, sp, 16 ; CHECK-NEXT: addi16 sp, sp, 16
; CHECK-NEXT: rts16 ; CHECK-NEXT: rts16
@ -1057,13 +1057,13 @@ define i64 @brRR_i64_ule(i64 %x, i64 %y) {
; CHECK-NEXT: btsti32 a2, 0 ; CHECK-NEXT: btsti32 a2, 0
; CHECK-NEXT: movf32 a1, a0 ; CHECK-NEXT: movf32 a1, a0
; CHECK-NEXT: btsti32 a1, 0 ; CHECK-NEXT: btsti32 a1, 0
; CHECK-NEXT: bt32 .LBB42_3 ; CHECK-NEXT: bt32 .LBB42_2
; CHECK-NEXT: # %bb.1: # %label1 ; CHECK-NEXT: # %bb.1: # %label1
; CHECK-NEXT: movi16 a0, 1 ; CHECK-NEXT: movi16 a0, 1
; CHECK-NEXT: br32 .LBB42_2 ; CHECK-NEXT: br32 .LBB42_3
; CHECK-NEXT: .LBB42_3: # %label2 ; CHECK-NEXT: .LBB42_2: # %label2
; CHECK-NEXT: movi16 a0, 0 ; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: .LBB42_2: # %label1 ; CHECK-NEXT: .LBB42_3: # %label1
; CHECK-NEXT: movi16 a1, 0 ; CHECK-NEXT: movi16 a1, 0
; CHECK-NEXT: addi16 sp, sp, 8 ; CHECK-NEXT: addi16 sp, sp, 8
; CHECK-NEXT: rts16 ; CHECK-NEXT: rts16
@ -1154,13 +1154,13 @@ define i64 @brRR_i64_sgt(i64 %x, i64 %y) {
; CHECK-NEXT: btsti32 a2, 0 ; CHECK-NEXT: btsti32 a2, 0
; CHECK-NEXT: movf32 a0, a1 ; CHECK-NEXT: movf32 a0, a1
; CHECK-NEXT: btsti32 a0, 0 ; CHECK-NEXT: btsti32 a0, 0
; CHECK-NEXT: bt32 .LBB45_3 ; CHECK-NEXT: bt32 .LBB45_2
; CHECK-NEXT: # %bb.1: # %label1 ; CHECK-NEXT: # %bb.1: # %label1
; CHECK-NEXT: movi16 a0, 1 ; CHECK-NEXT: movi16 a0, 1
; CHECK-NEXT: br32 .LBB45_2 ; CHECK-NEXT: br32 .LBB45_3
; CHECK-NEXT: .LBB45_3: # %label2 ; CHECK-NEXT: .LBB45_2: # %label2
; CHECK-NEXT: movi16 a0, 0 ; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: .LBB45_2: # %label1 ; CHECK-NEXT: .LBB45_3: # %label1
; CHECK-NEXT: movi16 a1, 0 ; CHECK-NEXT: movi16 a1, 0
; CHECK-NEXT: addi16 sp, sp, 12 ; CHECK-NEXT: addi16 sp, sp, 12
; CHECK-NEXT: rts16 ; CHECK-NEXT: rts16
@ -1197,13 +1197,13 @@ define i64 @brRI_i64_sgt(i64 %x) {
; CHECK-NEXT: btsti32 a2, 0 ; CHECK-NEXT: btsti32 a2, 0
; CHECK-NEXT: movf32 a1, a0 ; CHECK-NEXT: movf32 a1, a0
; CHECK-NEXT: btsti32 a1, 0 ; CHECK-NEXT: btsti32 a1, 0
; CHECK-NEXT: bt32 .LBB46_3 ; CHECK-NEXT: bt32 .LBB46_2
; CHECK-NEXT: # %bb.1: # %label1 ; CHECK-NEXT: # %bb.1: # %label1
; CHECK-NEXT: movi16 a0, 1 ; CHECK-NEXT: movi16 a0, 1
; CHECK-NEXT: br32 .LBB46_2 ; CHECK-NEXT: br32 .LBB46_3
; CHECK-NEXT: .LBB46_3: # %label2 ; CHECK-NEXT: .LBB46_2: # %label2
; CHECK-NEXT: movi16 a0, 0 ; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: .LBB46_2: # %label1 ; CHECK-NEXT: .LBB46_3: # %label1
; CHECK-NEXT: movi16 a1, 0 ; CHECK-NEXT: movi16 a1, 0
; CHECK-NEXT: addi16 sp, sp, 12 ; CHECK-NEXT: addi16 sp, sp, 12
; CHECK-NEXT: rts16 ; CHECK-NEXT: rts16
@ -1240,13 +1240,13 @@ define i64 @brR0_i64_sgt(i64 %x) {
; CHECK-NEXT: btsti32 a2, 0 ; CHECK-NEXT: btsti32 a2, 0
; CHECK-NEXT: movf32 a1, a0 ; CHECK-NEXT: movf32 a1, a0
; CHECK-NEXT: btsti32 a1, 0 ; CHECK-NEXT: btsti32 a1, 0
; CHECK-NEXT: bt32 .LBB47_3 ; CHECK-NEXT: bt32 .LBB47_2
; CHECK-NEXT: # %bb.1: # %label1 ; CHECK-NEXT: # %bb.1: # %label1
; CHECK-NEXT: movi16 a0, 1 ; CHECK-NEXT: movi16 a0, 1
; CHECK-NEXT: br32 .LBB47_2 ; CHECK-NEXT: br32 .LBB47_3
; CHECK-NEXT: .LBB47_3: # %label2 ; CHECK-NEXT: .LBB47_2: # %label2
; CHECK-NEXT: movi16 a0, 0 ; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: .LBB47_2: # %label1 ; CHECK-NEXT: .LBB47_3: # %label1
; CHECK-NEXT: movi16 a1, 0 ; CHECK-NEXT: movi16 a1, 0
; CHECK-NEXT: addi16 sp, sp, 12 ; CHECK-NEXT: addi16 sp, sp, 12
; CHECK-NEXT: rts16 ; CHECK-NEXT: rts16
@ -1283,13 +1283,13 @@ define i64 @brRR_i64_sge(i64 %x, i64 %y) {
; CHECK-NEXT: btsti32 a2, 0 ; CHECK-NEXT: btsti32 a2, 0
; CHECK-NEXT: movf32 a1, a0 ; CHECK-NEXT: movf32 a1, a0
; CHECK-NEXT: btsti32 a1, 0 ; CHECK-NEXT: btsti32 a1, 0
; CHECK-NEXT: bt32 .LBB48_3 ; CHECK-NEXT: bt32 .LBB48_2
; CHECK-NEXT: # %bb.1: # %label1 ; CHECK-NEXT: # %bb.1: # %label1
; CHECK-NEXT: movi16 a0, 1 ; CHECK-NEXT: movi16 a0, 1
; CHECK-NEXT: br32 .LBB48_2 ; CHECK-NEXT: br32 .LBB48_3
; CHECK-NEXT: .LBB48_3: # %label2 ; CHECK-NEXT: .LBB48_2: # %label2
; CHECK-NEXT: movi16 a0, 0 ; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: .LBB48_2: # %label1 ; CHECK-NEXT: .LBB48_3: # %label1
; CHECK-NEXT: movi16 a1, 0 ; CHECK-NEXT: movi16 a1, 0
; CHECK-NEXT: addi16 sp, sp, 12 ; CHECK-NEXT: addi16 sp, sp, 12
; CHECK-NEXT: rts16 ; CHECK-NEXT: rts16
@ -1326,13 +1326,13 @@ define i64 @brRI_i64_sge(i64 %x) {
; CHECK-NEXT: btsti32 a2, 0 ; CHECK-NEXT: btsti32 a2, 0
; CHECK-NEXT: movf32 a1, a0 ; CHECK-NEXT: movf32 a1, a0
; CHECK-NEXT: btsti32 a1, 0 ; CHECK-NEXT: btsti32 a1, 0
; CHECK-NEXT: bt32 .LBB49_3 ; CHECK-NEXT: bt32 .LBB49_2
; CHECK-NEXT: # %bb.1: # %label1 ; CHECK-NEXT: # %bb.1: # %label1
; CHECK-NEXT: movi16 a0, 1 ; CHECK-NEXT: movi16 a0, 1
; CHECK-NEXT: br32 .LBB49_2 ; CHECK-NEXT: br32 .LBB49_3
; CHECK-NEXT: .LBB49_3: # %label2 ; CHECK-NEXT: .LBB49_2: # %label2
; CHECK-NEXT: movi16 a0, 0 ; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: .LBB49_2: # %label1 ; CHECK-NEXT: .LBB49_3: # %label1
; CHECK-NEXT: movi16 a1, 0 ; CHECK-NEXT: movi16 a1, 0
; CHECK-NEXT: addi16 sp, sp, 12 ; CHECK-NEXT: addi16 sp, sp, 12
; CHECK-NEXT: rts16 ; CHECK-NEXT: rts16
@ -1392,13 +1392,13 @@ define i64 @brRR_i64_slt(i64 %x, i64 %y) {
; CHECK-NEXT: btsti32 a2, 0 ; CHECK-NEXT: btsti32 a2, 0
; CHECK-NEXT: movf32 a0, a1 ; CHECK-NEXT: movf32 a0, a1
; CHECK-NEXT: btsti32 a0, 0 ; CHECK-NEXT: btsti32 a0, 0
; CHECK-NEXT: bt32 .LBB51_3 ; CHECK-NEXT: bt32 .LBB51_2
; CHECK-NEXT: # %bb.1: # %label1 ; CHECK-NEXT: # %bb.1: # %label1
; CHECK-NEXT: movi16 a0, 1 ; CHECK-NEXT: movi16 a0, 1
; CHECK-NEXT: br32 .LBB51_2 ; CHECK-NEXT: br32 .LBB51_3
; CHECK-NEXT: .LBB51_3: # %label2 ; CHECK-NEXT: .LBB51_2: # %label2
; CHECK-NEXT: movi16 a0, 0 ; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: .LBB51_2: # %label1 ; CHECK-NEXT: .LBB51_3: # %label1
; CHECK-NEXT: movi16 a1, 0 ; CHECK-NEXT: movi16 a1, 0
; CHECK-NEXT: addi16 sp, sp, 12 ; CHECK-NEXT: addi16 sp, sp, 12
; CHECK-NEXT: rts16 ; CHECK-NEXT: rts16
@ -1436,13 +1436,13 @@ define i64 @brRI_i64_slt(i64 %x) {
; CHECK-NEXT: btsti32 a2, 0 ; CHECK-NEXT: btsti32 a2, 0
; CHECK-NEXT: movf32 a1, a0 ; CHECK-NEXT: movf32 a1, a0
; CHECK-NEXT: btsti32 a1, 0 ; CHECK-NEXT: btsti32 a1, 0
; CHECK-NEXT: bt32 .LBB52_3 ; CHECK-NEXT: bt32 .LBB52_2
; CHECK-NEXT: # %bb.1: # %label1 ; CHECK-NEXT: # %bb.1: # %label1
; CHECK-NEXT: movi16 a0, 1 ; CHECK-NEXT: movi16 a0, 1
; CHECK-NEXT: br32 .LBB52_2 ; CHECK-NEXT: br32 .LBB52_3
; CHECK-NEXT: .LBB52_3: # %label2 ; CHECK-NEXT: .LBB52_2: # %label2
; CHECK-NEXT: movi16 a0, 0 ; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: .LBB52_2: # %label1 ; CHECK-NEXT: .LBB52_3: # %label1
; CHECK-NEXT: movi16 a1, 0 ; CHECK-NEXT: movi16 a1, 0
; CHECK-NEXT: addi16 sp, sp, 12 ; CHECK-NEXT: addi16 sp, sp, 12
; CHECK-NEXT: rts16 ; CHECK-NEXT: rts16
@ -1463,12 +1463,12 @@ define i64 @brR0_i64_slt(i64 %x) {
; CHECK-NEXT: movih32 a0, 65535 ; CHECK-NEXT: movih32 a0, 65535
; CHECK-NEXT: ori32 a0, a0, 65535 ; CHECK-NEXT: ori32 a0, a0, 65535
; CHECK-NEXT: cmplt16 a0, a1 ; CHECK-NEXT: cmplt16 a0, a1
; CHECK-NEXT: bf32 .LBB53_1 ; CHECK-NEXT: bf32 .LBB53_2
; CHECK-NEXT: # %bb.2: # %label2 ; CHECK-NEXT: # %bb.1: # %label2
; CHECK-NEXT: movi16 a0, 0 ; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: movi16 a1, 0 ; CHECK-NEXT: movi16 a1, 0
; CHECK-NEXT: rts16 ; CHECK-NEXT: rts16
; CHECK-NEXT: .LBB53_1: # %label1 ; CHECK-NEXT: .LBB53_2: # %label1
; CHECK-NEXT: movi16 a0, 1 ; CHECK-NEXT: movi16 a0, 1
; CHECK-NEXT: movi16 a1, 0 ; CHECK-NEXT: movi16 a1, 0
; CHECK-NEXT: rts16 ; CHECK-NEXT: rts16
@ -1505,13 +1505,13 @@ define i64 @brRR_i64_sle(i64 %x, i64 %y) {
; CHECK-NEXT: btsti32 a2, 0 ; CHECK-NEXT: btsti32 a2, 0
; CHECK-NEXT: movf32 a1, a0 ; CHECK-NEXT: movf32 a1, a0
; CHECK-NEXT: btsti32 a1, 0 ; CHECK-NEXT: btsti32 a1, 0
; CHECK-NEXT: bt32 .LBB54_3 ; CHECK-NEXT: bt32 .LBB54_2
; CHECK-NEXT: # %bb.1: # %label1 ; CHECK-NEXT: # %bb.1: # %label1
; CHECK-NEXT: movi16 a0, 1 ; CHECK-NEXT: movi16 a0, 1
; CHECK-NEXT: br32 .LBB54_2 ; CHECK-NEXT: br32 .LBB54_3
; CHECK-NEXT: .LBB54_3: # %label2 ; CHECK-NEXT: .LBB54_2: # %label2
; CHECK-NEXT: movi16 a0, 0 ; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: .LBB54_2: # %label1 ; CHECK-NEXT: .LBB54_3: # %label1
; CHECK-NEXT: movi16 a1, 0 ; CHECK-NEXT: movi16 a1, 0
; CHECK-NEXT: addi16 sp, sp, 12 ; CHECK-NEXT: addi16 sp, sp, 12
; CHECK-NEXT: rts16 ; CHECK-NEXT: rts16
@ -1549,13 +1549,13 @@ define i64 @brRI_i64_sle(i64 %x) {
; CHECK-NEXT: btsti32 a2, 0 ; CHECK-NEXT: btsti32 a2, 0
; CHECK-NEXT: movf32 a1, a0 ; CHECK-NEXT: movf32 a1, a0
; CHECK-NEXT: btsti32 a1, 0 ; CHECK-NEXT: btsti32 a1, 0
; CHECK-NEXT: bt32 .LBB55_3 ; CHECK-NEXT: bt32 .LBB55_2
; CHECK-NEXT: # %bb.1: # %label1 ; CHECK-NEXT: # %bb.1: # %label1
; CHECK-NEXT: movi16 a0, 1 ; CHECK-NEXT: movi16 a0, 1
; CHECK-NEXT: br32 .LBB55_2 ; CHECK-NEXT: br32 .LBB55_3
; CHECK-NEXT: .LBB55_3: # %label2 ; CHECK-NEXT: .LBB55_2: # %label2
; CHECK-NEXT: movi16 a0, 0 ; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: .LBB55_2: # %label1 ; CHECK-NEXT: .LBB55_3: # %label1
; CHECK-NEXT: movi16 a1, 0 ; CHECK-NEXT: movi16 a1, 0
; CHECK-NEXT: addi16 sp, sp, 12 ; CHECK-NEXT: addi16 sp, sp, 12
; CHECK-NEXT: rts16 ; CHECK-NEXT: rts16
@ -1596,13 +1596,13 @@ define i64 @brR0_i64_sle(i64 %x) {
; CHECK-NEXT: btsti32 a2, 0 ; CHECK-NEXT: btsti32 a2, 0
; CHECK-NEXT: movf32 a1, a0 ; CHECK-NEXT: movf32 a1, a0
; CHECK-NEXT: btsti32 a1, 0 ; CHECK-NEXT: btsti32 a1, 0
; CHECK-NEXT: bt32 .LBB56_3 ; CHECK-NEXT: bt32 .LBB56_2
; CHECK-NEXT: # %bb.1: # %label1 ; CHECK-NEXT: # %bb.1: # %label1
; CHECK-NEXT: movi16 a0, 1 ; CHECK-NEXT: movi16 a0, 1
; CHECK-NEXT: br32 .LBB56_2 ; CHECK-NEXT: br32 .LBB56_3
; CHECK-NEXT: .LBB56_3: # %label2 ; CHECK-NEXT: .LBB56_2: # %label2
; CHECK-NEXT: movi16 a0, 0 ; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: .LBB56_2: # %label1 ; CHECK-NEXT: .LBB56_3: # %label1
; CHECK-NEXT: movi16 a1, 0 ; CHECK-NEXT: movi16 a1, 0
; CHECK-NEXT: addi16 sp, sp, 16 ; CHECK-NEXT: addi16 sp, sp, 16
; CHECK-NEXT: rts16 ; CHECK-NEXT: rts16
@ -1688,11 +1688,11 @@ define i16 @brR0_i16_eq(i16 %x) {
; CHECK-LABEL: brR0_i16_eq: ; CHECK-LABEL: brR0_i16_eq:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: zexth16 a0, a0 ; CHECK-NEXT: zexth16 a0, a0
; CHECK-NEXT: bez32 a0, .LBB60_1 ; CHECK-NEXT: bez32 a0, .LBB60_2
; CHECK-NEXT: # %bb.2: # %label2 ; CHECK-NEXT: # %bb.1: # %label2
; CHECK-NEXT: movi16 a0, 0 ; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: rts16 ; CHECK-NEXT: rts16
; CHECK-NEXT: .LBB60_1: # %label1 ; CHECK-NEXT: .LBB60_2: # %label1
; CHECK-NEXT: movi16 a0, 1 ; CHECK-NEXT: movi16 a0, 1
; CHECK-NEXT: rts16 ; CHECK-NEXT: rts16
entry: entry:
@ -2204,11 +2204,11 @@ define i16 @brR0_i16_slt(i16 %x) {
; CHECK-NEXT: movih32 a1, 65535 ; CHECK-NEXT: movih32 a1, 65535
; CHECK-NEXT: ori32 a1, a1, 65535 ; CHECK-NEXT: ori32 a1, a1, 65535
; CHECK-NEXT: cmplt16 a1, a0 ; CHECK-NEXT: cmplt16 a1, a0
; CHECK-NEXT: bf32 .LBB82_1 ; CHECK-NEXT: bf32 .LBB82_2
; CHECK-NEXT: # %bb.2: # %label2 ; CHECK-NEXT: # %bb.1: # %label2
; CHECK-NEXT: movi16 a0, 0 ; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: rts16 ; CHECK-NEXT: rts16
; CHECK-NEXT: .LBB82_1: # %label1 ; CHECK-NEXT: .LBB82_2: # %label1
; CHECK-NEXT: movi16 a0, 1 ; CHECK-NEXT: movi16 a0, 1
; CHECK-NEXT: rts16 ; CHECK-NEXT: rts16
; CHECK-UGTXT: icmpu32 a0, a1, a0 ; CHECK-UGTXT: icmpu32 a0, a1, a0
@ -2362,11 +2362,11 @@ define i8 @brR0_i8_eq(i8 %x) {
; CHECK-LABEL: brR0_i8_eq: ; CHECK-LABEL: brR0_i8_eq:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: zextb16 a0, a0 ; CHECK-NEXT: zextb16 a0, a0
; CHECK-NEXT: bez32 a0, .LBB89_1 ; CHECK-NEXT: bez32 a0, .LBB89_2
; CHECK-NEXT: # %bb.2: # %label2 ; CHECK-NEXT: # %bb.1: # %label2
; CHECK-NEXT: movi16 a0, 0 ; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: rts16 ; CHECK-NEXT: rts16
; CHECK-NEXT: .LBB89_1: # %label1 ; CHECK-NEXT: .LBB89_2: # %label1
; CHECK-NEXT: movi16 a0, 1 ; CHECK-NEXT: movi16 a0, 1
; CHECK-NEXT: rts16 ; CHECK-NEXT: rts16
entry: entry:
@ -2878,11 +2878,11 @@ define i8 @brR0_i8_slt(i8 %x) {
; CHECK-NEXT: movih32 a1, 65535 ; CHECK-NEXT: movih32 a1, 65535
; CHECK-NEXT: ori32 a1, a1, 65535 ; CHECK-NEXT: ori32 a1, a1, 65535
; CHECK-NEXT: cmplt16 a1, a0 ; CHECK-NEXT: cmplt16 a1, a0
; CHECK-NEXT: bf32 .LBB111_1 ; CHECK-NEXT: bf32 .LBB111_2
; CHECK-NEXT: # %bb.2: # %label2 ; CHECK-NEXT: # %bb.1: # %label2
; CHECK-NEXT: movi16 a0, 0 ; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: rts16 ; CHECK-NEXT: rts16
; CHECK-NEXT: .LBB111_1: # %label1 ; CHECK-NEXT: .LBB111_2: # %label1
; CHECK-NEXT: movi16 a0, 1 ; CHECK-NEXT: movi16 a0, 1
; CHECK-NEXT: rts16 ; CHECK-NEXT: rts16
; CHECK-UGTXT: icmpu32 a0, a1, a0 ; CHECK-UGTXT: icmpu32 a0, a1, a0
@ -3015,11 +3015,11 @@ define i1 @brRI_i1_eq(i1 %x) {
; CHECK-LABEL: brRI_i1_eq: ; CHECK-LABEL: brRI_i1_eq:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: andi32 a0, a0, 1 ; CHECK-NEXT: andi32 a0, a0, 1
; CHECK-NEXT: bez32 a0, .LBB117_1 ; CHECK-NEXT: bez32 a0, .LBB117_2
; CHECK-NEXT: # %bb.2: # %label2 ; CHECK-NEXT: # %bb.1: # %label2
; CHECK-NEXT: movi16 a0, 0 ; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: rts16 ; CHECK-NEXT: rts16
; CHECK-NEXT: .LBB117_1: # %label1 ; CHECK-NEXT: .LBB117_2: # %label1
; CHECK-NEXT: movi16 a0, 1 ; CHECK-NEXT: movi16 a0, 1
; CHECK-NEXT: rts16 ; CHECK-NEXT: rts16
entry: entry:
@ -3035,11 +3035,11 @@ define i1 @brR0_i1_eq(i1 %x) {
; CHECK-LABEL: brR0_i1_eq: ; CHECK-LABEL: brR0_i1_eq:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: andi32 a0, a0, 1 ; CHECK-NEXT: andi32 a0, a0, 1
; CHECK-NEXT: bez32 a0, .LBB118_1 ; CHECK-NEXT: bez32 a0, .LBB118_2
; CHECK-NEXT: # %bb.2: # %label2 ; CHECK-NEXT: # %bb.1: # %label2
; CHECK-NEXT: movi16 a0, 0 ; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: rts16 ; CHECK-NEXT: rts16
; CHECK-NEXT: .LBB118_1: # %label1 ; CHECK-NEXT: .LBB118_2: # %label1
; CHECK-NEXT: movi16 a0, 1 ; CHECK-NEXT: movi16 a0, 1
; CHECK-NEXT: rts16 ; CHECK-NEXT: rts16
entry: entry:
@ -3518,11 +3518,11 @@ define i1 @brRI_i1_slt(i1 %x) {
; CHECK-LABEL: brRI_i1_slt: ; CHECK-LABEL: brRI_i1_slt:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: andi32 a0, a0, 1 ; CHECK-NEXT: andi32 a0, a0, 1
; CHECK-NEXT: bnez32 a0, .LBB139_1 ; CHECK-NEXT: bnez32 a0, .LBB139_2
; CHECK-NEXT: # %bb.2: # %label2 ; CHECK-NEXT: # %bb.1: # %label2
; CHECK-NEXT: movi16 a0, 0 ; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: rts16 ; CHECK-NEXT: rts16
; CHECK-NEXT: .LBB139_1: # %label1 ; CHECK-NEXT: .LBB139_2: # %label1
; CHECK-NEXT: movi16 a0, 1 ; CHECK-NEXT: movi16 a0, 1
; CHECK-NEXT: rts16 ; CHECK-NEXT: rts16
; CHECK-UGTXT: icmpu32 a0, a1, a0 ; CHECK-UGTXT: icmpu32 a0, a1, a0
@ -3540,11 +3540,11 @@ define i1 @brR0_i1_slt(i1 %x) {
; CHECK-LABEL: brR0_i1_slt: ; CHECK-LABEL: brR0_i1_slt:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: andi32 a0, a0, 1 ; CHECK-NEXT: andi32 a0, a0, 1
; CHECK-NEXT: bnez32 a0, .LBB140_1 ; CHECK-NEXT: bnez32 a0, .LBB140_2
; CHECK-NEXT: # %bb.2: # %label2 ; CHECK-NEXT: # %bb.1: # %label2
; CHECK-NEXT: movi16 a0, 0 ; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: rts16 ; CHECK-NEXT: rts16
; CHECK-NEXT: .LBB140_1: # %label1 ; CHECK-NEXT: .LBB140_2: # %label1
; CHECK-NEXT: movi16 a0, 1 ; CHECK-NEXT: movi16 a0, 1
; CHECK-NEXT: rts16 ; CHECK-NEXT: rts16
; CHECK-UGTXT: icmpu32 a0, a1, a0 ; CHECK-UGTXT: icmpu32 a0, a1, a0

31
llvm/test/CodeGen/CSKY/indirectbr.ll
View File

@ -12,13 +12,18 @@ define i32 @f(i32 %x) #0 {
; CHECK-NEXT: ldr32.w a0, (a1, a0 << 2) ; CHECK-NEXT: ldr32.w a0, (a1, a0 << 2)
; CHECK-NEXT: jmp32 a0 ; CHECK-NEXT: jmp32 a0
; CHECK-NEXT: .Ltmp0: # Block address taken ; CHECK-NEXT: .Ltmp0: # Block address taken
; CHECK-NEXT: .LBB0_2: # %return ; CHECK-NEXT: .LBB0_1: # %return
; CHECK-NEXT: movi16 a0, 1 ; CHECK-NEXT: movi16 a0, 1
; CHECK-NEXT: rts16 ; CHECK-NEXT: rts16
; CHECK-NEXT: .Ltmp1: # Block address taken ; CHECK-NEXT: .Ltmp1: # Block address taken
; CHECK-NEXT: .LBB0_1: # %l2 ; CHECK-NEXT: .LBB0_2: # %l2
; CHECK-NEXT: movi16 a0, 2 ; CHECK-NEXT: movi16 a0, 2
; CHECK-NEXT: rts16 ; CHECK-NEXT: rts16
; CHECK-NEXT: .p2align 1
; CHECK-NEXT: # %bb.3:
; CHECK-NEXT: .p2align 2
; CHECK-NEXT: .LCPI0_0:
; CHECK-NEXT: .long .Lf.a
; ;
; CHECK-PIC-SMALL-LABEL: f: ; CHECK-PIC-SMALL-LABEL: f:
; CHECK-PIC-SMALL: # %bb.0: # %entry ; CHECK-PIC-SMALL: # %bb.0: # %entry
@ -33,16 +38,23 @@ define i32 @f(i32 %x) #0 {
; CHECK-PIC-SMALL-NEXT: ldr32.w a0, (a1, a0 << 2) ; CHECK-PIC-SMALL-NEXT: ldr32.w a0, (a1, a0 << 2)
; CHECK-PIC-SMALL-NEXT: jmp32 a0 ; CHECK-PIC-SMALL-NEXT: jmp32 a0
; CHECK-PIC-SMALL-NEXT: .Ltmp0: # Block address taken ; CHECK-PIC-SMALL-NEXT: .Ltmp0: # Block address taken
; CHECK-PIC-SMALL-NEXT: .LBB0_2: # %return ; CHECK-PIC-SMALL-NEXT: .LBB0_1: # %return
; CHECK-PIC-SMALL-NEXT: movi16 a0, 1 ; CHECK-PIC-SMALL-NEXT: movi16 a0, 1
; CHECK-PIC-SMALL-NEXT: br32 .LBB0_3 ; CHECK-PIC-SMALL-NEXT: br32 .LBB0_3
; CHECK-PIC-SMALL-NEXT: .Ltmp1: # Block address taken ; CHECK-PIC-SMALL-NEXT: .Ltmp1: # Block address taken
; CHECK-PIC-SMALL-NEXT: .LBB0_1: # %l2 ; CHECK-PIC-SMALL-NEXT: .LBB0_2: # %l2
; CHECK-PIC-SMALL-NEXT: movi16 a0, 2 ; CHECK-PIC-SMALL-NEXT: movi16 a0, 2
; CHECK-PIC-SMALL-NEXT: .LBB0_3: # %.split ; CHECK-PIC-SMALL-NEXT: .LBB0_3: # %.split
; CHECK-PIC-SMALL-NEXT: ld32.w rgb, (sp, 0) # 4-byte Folded Reload ; CHECK-PIC-SMALL-NEXT: ld32.w rgb, (sp, 0) # 4-byte Folded Reload
; CHECK-PIC-SMALL-NEXT: addi16 sp, sp, 4 ; CHECK-PIC-SMALL-NEXT: addi16 sp, sp, 4
; CHECK-PIC-SMALL-NEXT: rts16 ; CHECK-PIC-SMALL-NEXT: rts16
; CHECK-PIC-SMALL-NEXT: .p2align 1
; CHECK-PIC-SMALL-NEXT: # %bb.4:
; CHECK-PIC-SMALL-NEXT: .p2align 2
; CHECK-PIC-SMALL-NEXT: .LCPI0_0:
; CHECK-PIC-SMALL-NEXT: .long _GLOBAL_OFFSET_TABLE_
; CHECK-PIC-SMALL-NEXT: .LCPI0_1:
; CHECK-PIC-SMALL-NEXT: .long .Lf.a@GOTOFF
; ;
; CHECK-PIC-LARGE-LABEL: f: ; CHECK-PIC-LARGE-LABEL: f:
; CHECK-PIC-LARGE: # %bb.0: # %entry ; CHECK-PIC-LARGE: # %bb.0: # %entry
@ -57,16 +69,23 @@ define i32 @f(i32 %x) #0 {
; CHECK-PIC-LARGE-NEXT: ldr32.w a0, (a1, a0 << 2) ; CHECK-PIC-LARGE-NEXT: ldr32.w a0, (a1, a0 << 2)
; CHECK-PIC-LARGE-NEXT: jmp32 a0 ; CHECK-PIC-LARGE-NEXT: jmp32 a0
; CHECK-PIC-LARGE-NEXT: .Ltmp0: # Block address taken ; CHECK-PIC-LARGE-NEXT: .Ltmp0: # Block address taken
; CHECK-PIC-LARGE-NEXT: .LBB0_2: # %return ; CHECK-PIC-LARGE-NEXT: .LBB0_1: # %return
; CHECK-PIC-LARGE-NEXT: movi16 a0, 1 ; CHECK-PIC-LARGE-NEXT: movi16 a0, 1
; CHECK-PIC-LARGE-NEXT: br32 .LBB0_3 ; CHECK-PIC-LARGE-NEXT: br32 .LBB0_3
; CHECK-PIC-LARGE-NEXT: .Ltmp1: # Block address taken ; CHECK-PIC-LARGE-NEXT: .Ltmp1: # Block address taken
; CHECK-PIC-LARGE-NEXT: .LBB0_1: # %l2 ; CHECK-PIC-LARGE-NEXT: .LBB0_2: # %l2
; CHECK-PIC-LARGE-NEXT: movi16 a0, 2 ; CHECK-PIC-LARGE-NEXT: movi16 a0, 2
; CHECK-PIC-LARGE-NEXT: .LBB0_3: # %.split ; CHECK-PIC-LARGE-NEXT: .LBB0_3: # %.split
; CHECK-PIC-LARGE-NEXT: ld32.w rgb, (sp, 0) # 4-byte Folded Reload ; CHECK-PIC-LARGE-NEXT: ld32.w rgb, (sp, 0) # 4-byte Folded Reload
; CHECK-PIC-LARGE-NEXT: addi16 sp, sp, 4 ; CHECK-PIC-LARGE-NEXT: addi16 sp, sp, 4
; CHECK-PIC-LARGE-NEXT: rts16 ; CHECK-PIC-LARGE-NEXT: rts16
; CHECK-PIC-LARGE-NEXT: .p2align 1
; CHECK-PIC-LARGE-NEXT: # %bb.4:
; CHECK-PIC-LARGE-NEXT: .p2align 2
; CHECK-PIC-LARGE-NEXT: .LCPI0_0:
; CHECK-PIC-LARGE-NEXT: .long _GLOBAL_OFFSET_TABLE_
; CHECK-PIC-LARGE-NEXT: .LCPI0_1:
; CHECK-PIC-LARGE-NEXT: .long .Lf.a@GOTOFF
entry: entry:
%idxprom = sext i32 %x to i64 %idxprom = sext i32 %x to i64
%arrayidx = getelementptr inbounds [2 x i8*], [2 x i8*]* @f.a, i64 0, i64 %idxprom %arrayidx = getelementptr inbounds [2 x i8*], [2 x i8*]* @f.a, i64 0, i64 %idxprom

77
llvm/test/CodeGen/CSKY/switch.ll
View File

@ -8,30 +8,35 @@ define i32 @f(i32 %val) {
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movi16 a1, 4 ; CHECK-NEXT: movi16 a1, 4
; CHECK-NEXT: cmphs16 a1, a0 ; CHECK-NEXT: cmphs16 a1, a0
; CHECK-NEXT: bf32 .LBB0_7 ; CHECK-NEXT: bf32 .LBB0_3
; CHECK-NEXT: # %bb.1: # %entry ; CHECK-NEXT: # %bb.1: # %entry
; CHECK-NEXT: lrw32 a1, [.LCPI0_0] ; CHECK-NEXT: lrw32 a1, [.LCPI0_0]
; CHECK-NEXT: ldr32.w a0, (a1, a0 << 2) ; CHECK-NEXT: ldr32.w a0, (a1, a0 << 2)
; CHECK-NEXT: jmp32 a0 ; CHECK-NEXT: jmp32 a0
; CHECK-NEXT: .LBB0_4: # %onzero ; CHECK-NEXT: .LBB0_2: # %onzero
; CHECK-NEXT: movi16 a0, 0 ; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: rts16 ; CHECK-NEXT: rts16
; CHECK-NEXT: .LBB0_7: # %otherwise ; CHECK-NEXT: .LBB0_3: # %otherwise
; CHECK-NEXT: movih32 a0, 65535 ; CHECK-NEXT: movih32 a0, 65535
; CHECK-NEXT: ori32 a0, a0, 65535 ; CHECK-NEXT: ori32 a0, a0, 65535
; CHECK-NEXT: rts16 ; CHECK-NEXT: rts16
; CHECK-NEXT: .LBB0_2: # %onone ; CHECK-NEXT: .LBB0_4: # %onone
; CHECK-NEXT: movi16 a0, 1 ; CHECK-NEXT: movi16 a0, 1
; CHECK-NEXT: rts16 ; CHECK-NEXT: rts16
; CHECK-NEXT: .LBB0_3: # %ontwo ; CHECK-NEXT: .LBB0_5: # %ontwo
; CHECK-NEXT: movi16 a0, 2 ; CHECK-NEXT: movi16 a0, 2
; CHECK-NEXT: rts16 ; CHECK-NEXT: rts16
; CHECK-NEXT: .LBB0_5: # %onfour ; CHECK-NEXT: .LBB0_6: # %onfour
; CHECK-NEXT: movi16 a0, 4 ; CHECK-NEXT: movi16 a0, 4
; CHECK-NEXT: rts16 ; CHECK-NEXT: rts16
; CHECK-NEXT: .LBB0_6: # %onthree ; CHECK-NEXT: .LBB0_7: # %onthree
; CHECK-NEXT: movi16 a0, 3 ; CHECK-NEXT: movi16 a0, 3
; CHECK-NEXT: rts16 ; CHECK-NEXT: rts16
; CHECK-NEXT: .p2align 1
; CHECK-NEXT: # %bb.8:
; CHECK-NEXT: .p2align 2
; CHECK-NEXT: .LCPI0_0:
; CHECK-NEXT: .long .LJTI0_0
; ;
; CHECK-PIC-SMALL-LABEL: f: ; CHECK-PIC-SMALL-LABEL: f:
; CHECK-PIC-SMALL: # %bb.0: # %entry ; CHECK-PIC-SMALL: # %bb.0: # %entry
@ -43,35 +48,42 @@ define i32 @f(i32 %val) {
; CHECK-PIC-SMALL-NEXT: lrw32 rgb, [.LCPI0_0] ; CHECK-PIC-SMALL-NEXT: lrw32 rgb, [.LCPI0_0]
; CHECK-PIC-SMALL-NEXT: movi16 a1, 4 ; CHECK-PIC-SMALL-NEXT: movi16 a1, 4
; CHECK-PIC-SMALL-NEXT: cmphs16 a1, a0 ; CHECK-PIC-SMALL-NEXT: cmphs16 a1, a0
; CHECK-PIC-SMALL-NEXT: bf32 .LBB0_8 ; CHECK-PIC-SMALL-NEXT: bf32 .LBB0_3
; CHECK-PIC-SMALL-NEXT: # %bb.1: # %entry ; CHECK-PIC-SMALL-NEXT: # %bb.1: # %entry
; CHECK-PIC-SMALL-NEXT: lrw32 a1, [.LCPI0_1] ; CHECK-PIC-SMALL-NEXT: lrw32 a1, [.LCPI0_1]
; CHECK-PIC-SMALL-NEXT: addu32 a1, rgb, a1 ; CHECK-PIC-SMALL-NEXT: addu32 a1, rgb, a1
; CHECK-PIC-SMALL-NEXT: ldr32.w a0, (a1, a0 << 2) ; CHECK-PIC-SMALL-NEXT: ldr32.w a0, (a1, a0 << 2)
; CHECK-PIC-SMALL-NEXT: addu16 a0, a1 ; CHECK-PIC-SMALL-NEXT: addu16 a0, a1
; CHECK-PIC-SMALL-NEXT: jmp32 a0 ; CHECK-PIC-SMALL-NEXT: jmp32 a0
; CHECK-PIC-SMALL-NEXT: .LBB0_5: # %onzero ; CHECK-PIC-SMALL-NEXT: .LBB0_2: # %onzero
; CHECK-PIC-SMALL-NEXT: movi16 a0, 0 ; CHECK-PIC-SMALL-NEXT: movi16 a0, 0
; CHECK-PIC-SMALL-NEXT: br32 .LBB0_3 ; CHECK-PIC-SMALL-NEXT: br32 .LBB0_8
; CHECK-PIC-SMALL-NEXT: .LBB0_8: # %otherwise ; CHECK-PIC-SMALL-NEXT: .LBB0_3: # %otherwise
; CHECK-PIC-SMALL-NEXT: movih32 a0, 65535 ; CHECK-PIC-SMALL-NEXT: movih32 a0, 65535
; CHECK-PIC-SMALL-NEXT: ori32 a0, a0, 65535 ; CHECK-PIC-SMALL-NEXT: ori32 a0, a0, 65535
; CHECK-PIC-SMALL-NEXT: br32 .LBB0_3 ; CHECK-PIC-SMALL-NEXT: br32 .LBB0_8
; CHECK-PIC-SMALL-NEXT: .LBB0_2: # %onone ; CHECK-PIC-SMALL-NEXT: .LBB0_4: # %onone
; CHECK-PIC-SMALL-NEXT: movi16 a0, 1 ; CHECK-PIC-SMALL-NEXT: movi16 a0, 1
; CHECK-PIC-SMALL-NEXT: br32 .LBB0_3 ; CHECK-PIC-SMALL-NEXT: br32 .LBB0_8
; CHECK-PIC-SMALL-NEXT: .LBB0_4: # %ontwo ; CHECK-PIC-SMALL-NEXT: .LBB0_5: # %ontwo
; CHECK-PIC-SMALL-NEXT: movi16 a0, 2 ; CHECK-PIC-SMALL-NEXT: movi16 a0, 2
; CHECK-PIC-SMALL-NEXT: br32 .LBB0_3 ; CHECK-PIC-SMALL-NEXT: br32 .LBB0_8
; CHECK-PIC-SMALL-NEXT: .LBB0_6: # %onfour ; CHECK-PIC-SMALL-NEXT: .LBB0_6: # %onfour
; CHECK-PIC-SMALL-NEXT: movi16 a0, 4 ; CHECK-PIC-SMALL-NEXT: movi16 a0, 4
; CHECK-PIC-SMALL-NEXT: br32 .LBB0_3 ; CHECK-PIC-SMALL-NEXT: br32 .LBB0_8
; CHECK-PIC-SMALL-NEXT: .LBB0_7: # %onthree ; CHECK-PIC-SMALL-NEXT: .LBB0_7: # %onthree
; CHECK-PIC-SMALL-NEXT: movi16 a0, 3 ; CHECK-PIC-SMALL-NEXT: movi16 a0, 3
; CHECK-PIC-SMALL-NEXT: .LBB0_3: # %onone ; CHECK-PIC-SMALL-NEXT: .LBB0_8: # %onone
; CHECK-PIC-SMALL-NEXT: ld32.w rgb, (sp, 0) # 4-byte Folded Reload ; CHECK-PIC-SMALL-NEXT: ld32.w rgb, (sp, 0) # 4-byte Folded Reload
; CHECK-PIC-SMALL-NEXT: addi16 sp, sp, 4 ; CHECK-PIC-SMALL-NEXT: addi16 sp, sp, 4
; CHECK-PIC-SMALL-NEXT: rts16 ; CHECK-PIC-SMALL-NEXT: rts16
; CHECK-PIC-SMALL-NEXT: .p2align 1
; CHECK-PIC-SMALL-NEXT: # %bb.9:
; CHECK-PIC-SMALL-NEXT: .p2align 2
; CHECK-PIC-SMALL-NEXT: .LCPI0_0:
; CHECK-PIC-SMALL-NEXT: .long _GLOBAL_OFFSET_TABLE_
; CHECK-PIC-SMALL-NEXT: .LCPI0_1:
; CHECK-PIC-SMALL-NEXT: .long .LJTI0_0@GOTOFF
; ;
; CHECK-PIC-LARGE-LABEL: f: ; CHECK-PIC-LARGE-LABEL: f:
; CHECK-PIC-LARGE: # %bb.0: # %entry ; CHECK-PIC-LARGE: # %bb.0: # %entry
@ -83,35 +95,42 @@ define i32 @f(i32 %val) {
; CHECK-PIC-LARGE-NEXT: lrw32 rgb, [.LCPI0_0] ; CHECK-PIC-LARGE-NEXT: lrw32 rgb, [.LCPI0_0]
; CHECK-PIC-LARGE-NEXT: movi16 a1, 4 ; CHECK-PIC-LARGE-NEXT: movi16 a1, 4
; CHECK-PIC-LARGE-NEXT: cmphs16 a1, a0 ; CHECK-PIC-LARGE-NEXT: cmphs16 a1, a0
; CHECK-PIC-LARGE-NEXT: bf32 .LBB0_8 ; CHECK-PIC-LARGE-NEXT: bf32 .LBB0_3
; CHECK-PIC-LARGE-NEXT: # %bb.1: # %entry ; CHECK-PIC-LARGE-NEXT: # %bb.1: # %entry
; CHECK-PIC-LARGE-NEXT: lrw32 a1, [.LCPI0_1] ; CHECK-PIC-LARGE-NEXT: lrw32 a1, [.LCPI0_1]
; CHECK-PIC-LARGE-NEXT: addu32 a1, rgb, a1 ; CHECK-PIC-LARGE-NEXT: addu32 a1, rgb, a1
; CHECK-PIC-LARGE-NEXT: ldr32.w a0, (a1, a0 << 2) ; CHECK-PIC-LARGE-NEXT: ldr32.w a0, (a1, a0 << 2)
; CHECK-PIC-LARGE-NEXT: addu16 a0, a1 ; CHECK-PIC-LARGE-NEXT: addu16 a0, a1
; CHECK-PIC-LARGE-NEXT: jmp32 a0 ; CHECK-PIC-LARGE-NEXT: jmp32 a0
; CHECK-PIC-LARGE-NEXT: .LBB0_5: # %onzero ; CHECK-PIC-LARGE-NEXT: .LBB0_2: # %onzero
; CHECK-PIC-LARGE-NEXT: movi16 a0, 0 ; CHECK-PIC-LARGE-NEXT: movi16 a0, 0
; CHECK-PIC-LARGE-NEXT: br32 .LBB0_3 ; CHECK-PIC-LARGE-NEXT: br32 .LBB0_8
; CHECK-PIC-LARGE-NEXT: .LBB0_8: # %otherwise ; CHECK-PIC-LARGE-NEXT: .LBB0_3: # %otherwise
; CHECK-PIC-LARGE-NEXT: movih32 a0, 65535 ; CHECK-PIC-LARGE-NEXT: movih32 a0, 65535
; CHECK-PIC-LARGE-NEXT: ori32 a0, a0, 65535 ; CHECK-PIC-LARGE-NEXT: ori32 a0, a0, 65535
; CHECK-PIC-LARGE-NEXT: br32 .LBB0_3 ; CHECK-PIC-LARGE-NEXT: br32 .LBB0_8
; CHECK-PIC-LARGE-NEXT: .LBB0_2: # %onone ; CHECK-PIC-LARGE-NEXT: .LBB0_4: # %onone
; CHECK-PIC-LARGE-NEXT: movi16 a0, 1 ; CHECK-PIC-LARGE-NEXT: movi16 a0, 1
; CHECK-PIC-LARGE-NEXT: br32 .LBB0_3 ; CHECK-PIC-LARGE-NEXT: br32 .LBB0_8
; CHECK-PIC-LARGE-NEXT: .LBB0_4: # %ontwo ; CHECK-PIC-LARGE-NEXT: .LBB0_5: # %ontwo
; CHECK-PIC-LARGE-NEXT: movi16 a0, 2 ; CHECK-PIC-LARGE-NEXT: movi16 a0, 2
; CHECK-PIC-LARGE-NEXT: br32 .LBB0_3 ; CHECK-PIC-LARGE-NEXT: br32 .LBB0_8
; CHECK-PIC-LARGE-NEXT: .LBB0_6: # %onfour ; CHECK-PIC-LARGE-NEXT: .LBB0_6: # %onfour
; CHECK-PIC-LARGE-NEXT: movi16 a0, 4 ; CHECK-PIC-LARGE-NEXT: movi16 a0, 4
; CHECK-PIC-LARGE-NEXT: br32 .LBB0_3 ; CHECK-PIC-LARGE-NEXT: br32 .LBB0_8
; CHECK-PIC-LARGE-NEXT: .LBB0_7: # %onthree ; CHECK-PIC-LARGE-NEXT: .LBB0_7: # %onthree
; CHECK-PIC-LARGE-NEXT: movi16 a0, 3 ; CHECK-PIC-LARGE-NEXT: movi16 a0, 3
; CHECK-PIC-LARGE-NEXT: .LBB0_3: # %onone ; CHECK-PIC-LARGE-NEXT: .LBB0_8: # %onone
; CHECK-PIC-LARGE-NEXT: ld32.w rgb, (sp, 0) # 4-byte Folded Reload ; CHECK-PIC-LARGE-NEXT: ld32.w rgb, (sp, 0) # 4-byte Folded Reload
; CHECK-PIC-LARGE-NEXT: addi16 sp, sp, 4 ; CHECK-PIC-LARGE-NEXT: addi16 sp, sp, 4
; CHECK-PIC-LARGE-NEXT: rts16 ; CHECK-PIC-LARGE-NEXT: rts16
; CHECK-PIC-LARGE-NEXT: .p2align 1
; CHECK-PIC-LARGE-NEXT: # %bb.9:
; CHECK-PIC-LARGE-NEXT: .p2align 2
; CHECK-PIC-LARGE-NEXT: .LCPI0_0:
; CHECK-PIC-LARGE-NEXT: .long _GLOBAL_OFFSET_TABLE_
; CHECK-PIC-LARGE-NEXT: .LCPI0_1:
; CHECK-PIC-LARGE-NEXT: .long .LJTI0_0@GOTOFF
entry: entry:
switch i32 %val, label %otherwise [ i32 0, label %onzero switch i32 %val, label %otherwise [ i32 0, label %onzero
i32 1, label %onone i32 1, label %onone