forked from OSchip/llvm-project
[X86][SSE] Fold movmsk(not(x)) -> not(movmsk)
Helps to improve folding of comparisons with movmsk results. llvm-svn: 361056
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065431c82b
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@ -41498,6 +41498,8 @@ static SDValue combineMOVMSK(SDNode *N, SelectionDAG &DAG,
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SDValue Src = N->getOperand(0);
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MVT SrcVT = Src.getSimpleValueType();
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MVT VT = N->getSimpleValueType(0);
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unsigned NumBits = VT.getScalarSizeInBits();
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unsigned NumElts = SrcVT.getVectorNumElements();
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// Perform constant folding.
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if (ISD::isBuildVectorOfConstantSDNodes(Src.getNode())) {
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@ -41517,9 +41519,20 @@ static SDValue combineMOVMSK(SDNode *N, SelectionDAG &DAG,
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Src.getOperand(0).getScalarValueSizeInBits() == EltWidth)
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return DAG.getNode(X86ISD::MOVMSK, SDLoc(N), VT, Src.getOperand(0));
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// Fold movmsk(not(x)) -> not(movmsk) to improve folding of movmsk results
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// with scalar comparisons.
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if (SDValue NotSrc = IsNOT(Src, DAG)) {
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SDLoc DL(N);
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APInt NotMask = APInt::getLowBitsSet(NumBits, NumElts);
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NotSrc = DAG.getBitcast(SrcVT, NotSrc);
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return DAG.getNode(ISD::XOR, DL, VT,
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DAG.getNode(X86ISD::MOVMSK, DL, VT, NotSrc),
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DAG.getConstant(NotMask, DL, VT));
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}
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// Simplify the inputs.
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const TargetLowering &TLI = DAG.getTargetLoweringInfo();
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APInt DemandedMask(APInt::getAllOnesValue(VT.getScalarSizeInBits()));
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APInt DemandedMask(APInt::getAllOnesValue(NumBits));
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if (TLI.SimplifyDemandedBits(SDValue(N, 0), DemandedMask, DCI))
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return SDValue(N, 0);
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@ -4485,9 +4485,8 @@ define i1 @movmsk_v2i64(<2 x i64> %x, <2 x i64> %y) {
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; SSE2-NEXT: pcmpeqd %xmm1, %xmm0
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; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,0,3,2]
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; SSE2-NEXT: pand %xmm0, %xmm1
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; SSE2-NEXT: pcmpeqd %xmm0, %xmm0
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; SSE2-NEXT: pxor %xmm1, %xmm0
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; SSE2-NEXT: movmskpd %xmm0, %eax
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; SSE2-NEXT: movmskpd %xmm1, %eax
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; SSE2-NEXT: xorl $3, %eax
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; SSE2-NEXT: cmpb $3, %al
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; SSE2-NEXT: sete %al
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; SSE2-NEXT: retq
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@ -4495,9 +4494,8 @@ define i1 @movmsk_v2i64(<2 x i64> %x, <2 x i64> %y) {
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; AVX-LABEL: movmsk_v2i64:
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; AVX: # %bb.0:
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; AVX-NEXT: vpcmpeqq %xmm1, %xmm0, %xmm0
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; AVX-NEXT: vpcmpeqd %xmm1, %xmm1, %xmm1
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; AVX-NEXT: vpxor %xmm1, %xmm0, %xmm0
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; AVX-NEXT: vmovmskpd %xmm0, %eax
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; AVX-NEXT: xorl $3, %eax
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; AVX-NEXT: cmpb $3, %al
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; AVX-NEXT: sete %al
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; AVX-NEXT: retq
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@ -1102,9 +1102,8 @@ define i1 @bool_reduction_v4i32(<4 x i32> %x, <4 x i32> %y) {
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; SSE-LABEL: bool_reduction_v4i32:
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; SSE: # %bb.0:
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; SSE-NEXT: pcmpeqd %xmm1, %xmm0
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; SSE-NEXT: pcmpeqd %xmm1, %xmm1
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; SSE-NEXT: pxor %xmm0, %xmm1
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; SSE-NEXT: movmskps %xmm1, %eax
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; SSE-NEXT: movmskps %xmm0, %eax
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; SSE-NEXT: xorl $15, %eax
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; SSE-NEXT: cmpb $15, %al
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; SSE-NEXT: sete %al
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; SSE-NEXT: retq
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@ -1112,9 +1111,8 @@ define i1 @bool_reduction_v4i32(<4 x i32> %x, <4 x i32> %y) {
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; AVX-LABEL: bool_reduction_v4i32:
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; AVX: # %bb.0:
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; AVX-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0
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; AVX-NEXT: vpcmpeqd %xmm1, %xmm1, %xmm1
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; AVX-NEXT: vpxor %xmm1, %xmm0, %xmm0
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; AVX-NEXT: vmovmskps %xmm0, %eax
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; AVX-NEXT: xorl $15, %eax
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; AVX-NEXT: cmpb $15, %al
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; AVX-NEXT: sete %al
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; AVX-NEXT: retq
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@ -1018,20 +1018,16 @@ define i1 @bool_reduction_v4i32(<4 x i32> %x, <4 x i32> %y) {
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; SSE-LABEL: bool_reduction_v4i32:
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; SSE: # %bb.0:
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; SSE-NEXT: pcmpeqd %xmm1, %xmm0
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; SSE-NEXT: pcmpeqd %xmm1, %xmm1
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; SSE-NEXT: pxor %xmm0, %xmm1
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; SSE-NEXT: movmskps %xmm1, %eax
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; SSE-NEXT: testb %al, %al
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; SSE-NEXT: movmskps %xmm0, %eax
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; SSE-NEXT: xorb $15, %al
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; SSE-NEXT: setne %al
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; SSE-NEXT: retq
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;
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; AVX-LABEL: bool_reduction_v4i32:
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; AVX: # %bb.0:
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; AVX-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0
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; AVX-NEXT: vpcmpeqd %xmm1, %xmm1, %xmm1
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; AVX-NEXT: vpxor %xmm1, %xmm0, %xmm0
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; AVX-NEXT: vmovmskps %xmm0, %eax
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; AVX-NEXT: testb %al, %al
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; AVX-NEXT: xorb $15, %al
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; AVX-NEXT: setne %al
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; AVX-NEXT: retq
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;
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