Remove special cases for [LM]FENCE, MONITOR and MWAIT from

encoder and decoder by using new MRM_ forms.

llvm-svn: 96048
This commit is contained in:
Chris Lattner 2010-02-12 23:54:57 +00:00
parent cfcb775b56
commit 064e926362
4 changed files with 9 additions and 41 deletions

View File

@ -762,27 +762,8 @@ void Emitter<CodeEmitter>::emitInstruction(const MachineInstr &MI,
case X86II::MRM4r: case X86II::MRM5r:
case X86II::MRM6r: case X86II::MRM7r: {
MCE.emitByte(BaseOpcode);
// Special handling of lfence, mfence, monitor, and mwait.
if (Desc->getOpcode() == X86::LFENCE ||
Desc->getOpcode() == X86::MFENCE ||
Desc->getOpcode() == X86::MONITOR ||
Desc->getOpcode() == X86::MWAIT) {
emitRegModRMByte((Desc->TSFlags & X86II::FormMask)-X86II::MRM0r);
switch (Desc->getOpcode()) {
default: break;
case X86::MONITOR:
MCE.emitByte(0xC8);
break;
case X86::MWAIT:
MCE.emitByte(0xC9);
break;
}
} else {
emitRegModRMByte(MI.getOperand(CurOp++).getReg(),
(Desc->TSFlags & X86II::FormMask)-X86II::MRM0r);
}
emitRegModRMByte(MI.getOperand(CurOp++).getReg(),
(Desc->TSFlags & X86II::FormMask)-X86II::MRM0r);
if (CurOp == NumOps)
break;

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@ -2315,9 +2315,9 @@ def CLFLUSH : I<0xAE, MRM7m, (outs), (ins i8mem:$src),
TB, Requires<[HasSSE2]>;
// Load, store, and memory fence
def LFENCE : I<0xAE, MRM5r, (outs), (ins),
def LFENCE : I<0xAE, MRM_E8, (outs), (ins),
"lfence", [(int_x86_sse2_lfence)]>, TB, Requires<[HasSSE2]>;
def MFENCE : I<0xAE, MRM6r, (outs), (ins),
def MFENCE : I<0xAE, MRM_F0, (outs), (ins),
"mfence", [(int_x86_sse2_mfence)]>, TB, Requires<[HasSSE2]>;
//TODO: custom lower this so as to never even generate the noop
@ -2616,9 +2616,9 @@ let Constraints = "$src1 = $dst" in {
}
// Thread synchronization
def MONITOR : I<0x01, MRM1r, (outs), (ins), "monitor",
def MONITOR : I<0x01, MRM_C8, (outs), (ins), "monitor",
[(int_x86_sse3_monitor EAX, ECX, EDX)]>,TB, Requires<[HasSSE3]>;
def MWAIT : I<0x01, MRM1r, (outs), (ins), "mwait",
def MWAIT : I<0x01, MRM_C9, (outs), (ins), "mwait",
[(int_x86_sse3_mwait ECX, EAX)]>, TB, Requires<[HasSSE3]>;
// vector_shuffle v1, <undef> <1, 1, 3, 3>

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@ -568,19 +568,9 @@ EncodeInstruction(const MCInst &MI, raw_ostream &OS,
case X86II::MRM4r: case X86II::MRM5r:
case X86II::MRM6r: case X86II::MRM7r:
EmitByte(BaseOpcode, CurByte, OS);
// Special handling of lfence, mfence, monitor, and mwait.
// FIXME: This is terrible, they should get proper encoding bits in TSFlags.
if (Opcode == X86::LFENCE || Opcode == X86::MFENCE ||
Opcode == X86::MONITOR || Opcode == X86::MWAIT) {
EmitByte(ModRMByte(3, (TSFlags & X86II::FormMask)-X86II::MRM0r,
Opcode == X86::MWAIT),
CurByte, OS);
} else {
EmitRegModRMByte(MI.getOperand(CurOp++),
(TSFlags & X86II::FormMask)-X86II::MRM0r,
CurByte, OS);
}
EmitRegModRMByte(MI.getOperand(CurOp++),
(TSFlags & X86II::FormMask)-X86II::MRM0r,
CurByte, OS);
break;
case X86II::MRM0m: case X86II::MRM1m:
case X86II::MRM2m: case X86II::MRM3m:

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@ -591,12 +591,9 @@ void RecognizableInstr::emitDecodePath(DisassemblerTables &tables) const {
return; \
}
EXACTCASE(TWOBYTE, "MONITOR", 0xc8)
EXACTCASE(TWOBYTE, "MWAIT", 0xc9)
EXACTCASE(TWOBYTE, "SWPGS", 0xf8)
EXACTCASE(TWOBYTE, "INVEPT", 0x80)
EXACTCASE(TWOBYTE, "INVVPID", 0x81)
//EXACTCASE(TWOBYTE, "VMCALL", 0xc1) - Handled by MRM_ form; safe to remove
EXACTCASE(TWOBYTE, "VMLAUNCH", 0xc2)
EXACTCASE(TWOBYTE, "VMRESUME", 0xc3)
EXACTCASE(TWOBYTE, "VMXOFF", 0xc4)