forked from OSchip/llvm-project
Remove special cases for [LM]FENCE, MONITOR and MWAIT from
encoder and decoder by using new MRM_ forms. llvm-svn: 96048
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cfcb775b56
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064e926362
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@ -762,27 +762,8 @@ void Emitter<CodeEmitter>::emitInstruction(const MachineInstr &MI,
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case X86II::MRM4r: case X86II::MRM5r:
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case X86II::MRM6r: case X86II::MRM7r: {
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MCE.emitByte(BaseOpcode);
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// Special handling of lfence, mfence, monitor, and mwait.
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if (Desc->getOpcode() == X86::LFENCE ||
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Desc->getOpcode() == X86::MFENCE ||
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Desc->getOpcode() == X86::MONITOR ||
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Desc->getOpcode() == X86::MWAIT) {
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emitRegModRMByte((Desc->TSFlags & X86II::FormMask)-X86II::MRM0r);
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switch (Desc->getOpcode()) {
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default: break;
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case X86::MONITOR:
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MCE.emitByte(0xC8);
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break;
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case X86::MWAIT:
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MCE.emitByte(0xC9);
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break;
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}
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} else {
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emitRegModRMByte(MI.getOperand(CurOp++).getReg(),
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(Desc->TSFlags & X86II::FormMask)-X86II::MRM0r);
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}
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emitRegModRMByte(MI.getOperand(CurOp++).getReg(),
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(Desc->TSFlags & X86II::FormMask)-X86II::MRM0r);
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if (CurOp == NumOps)
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break;
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@ -2315,9 +2315,9 @@ def CLFLUSH : I<0xAE, MRM7m, (outs), (ins i8mem:$src),
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TB, Requires<[HasSSE2]>;
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// Load, store, and memory fence
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def LFENCE : I<0xAE, MRM5r, (outs), (ins),
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def LFENCE : I<0xAE, MRM_E8, (outs), (ins),
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"lfence", [(int_x86_sse2_lfence)]>, TB, Requires<[HasSSE2]>;
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def MFENCE : I<0xAE, MRM6r, (outs), (ins),
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def MFENCE : I<0xAE, MRM_F0, (outs), (ins),
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"mfence", [(int_x86_sse2_mfence)]>, TB, Requires<[HasSSE2]>;
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//TODO: custom lower this so as to never even generate the noop
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@ -2616,9 +2616,9 @@ let Constraints = "$src1 = $dst" in {
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}
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// Thread synchronization
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def MONITOR : I<0x01, MRM1r, (outs), (ins), "monitor",
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def MONITOR : I<0x01, MRM_C8, (outs), (ins), "monitor",
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[(int_x86_sse3_monitor EAX, ECX, EDX)]>,TB, Requires<[HasSSE3]>;
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def MWAIT : I<0x01, MRM1r, (outs), (ins), "mwait",
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def MWAIT : I<0x01, MRM_C9, (outs), (ins), "mwait",
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[(int_x86_sse3_mwait ECX, EAX)]>, TB, Requires<[HasSSE3]>;
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// vector_shuffle v1, <undef> <1, 1, 3, 3>
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@ -568,19 +568,9 @@ EncodeInstruction(const MCInst &MI, raw_ostream &OS,
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case X86II::MRM4r: case X86II::MRM5r:
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case X86II::MRM6r: case X86II::MRM7r:
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EmitByte(BaseOpcode, CurByte, OS);
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// Special handling of lfence, mfence, monitor, and mwait.
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// FIXME: This is terrible, they should get proper encoding bits in TSFlags.
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if (Opcode == X86::LFENCE || Opcode == X86::MFENCE ||
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Opcode == X86::MONITOR || Opcode == X86::MWAIT) {
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EmitByte(ModRMByte(3, (TSFlags & X86II::FormMask)-X86II::MRM0r,
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Opcode == X86::MWAIT),
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CurByte, OS);
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} else {
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EmitRegModRMByte(MI.getOperand(CurOp++),
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(TSFlags & X86II::FormMask)-X86II::MRM0r,
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CurByte, OS);
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}
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EmitRegModRMByte(MI.getOperand(CurOp++),
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(TSFlags & X86II::FormMask)-X86II::MRM0r,
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CurByte, OS);
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break;
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case X86II::MRM0m: case X86II::MRM1m:
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case X86II::MRM2m: case X86II::MRM3m:
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@ -591,12 +591,9 @@ void RecognizableInstr::emitDecodePath(DisassemblerTables &tables) const {
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return; \
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}
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EXACTCASE(TWOBYTE, "MONITOR", 0xc8)
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EXACTCASE(TWOBYTE, "MWAIT", 0xc9)
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EXACTCASE(TWOBYTE, "SWPGS", 0xf8)
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EXACTCASE(TWOBYTE, "INVEPT", 0x80)
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EXACTCASE(TWOBYTE, "INVVPID", 0x81)
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//EXACTCASE(TWOBYTE, "VMCALL", 0xc1) - Handled by MRM_ form; safe to remove
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EXACTCASE(TWOBYTE, "VMLAUNCH", 0xc2)
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EXACTCASE(TWOBYTE, "VMRESUME", 0xc3)
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EXACTCASE(TWOBYTE, "VMXOFF", 0xc4)
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