From 063363fa8016ec53f219f970061c3019e786206a Mon Sep 17 00:00:00 2001 From: Chris Lattner Date: Wed, 8 Sep 2010 05:38:31 +0000 Subject: [PATCH] implement the iret suite of instructions properly, fixing rdar://8403974 llvm-svn: 113349 --- llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp | 1 + llvm/lib/Target/X86/X86Instr64bit.td | 3 ++- llvm/lib/Target/X86/X86InstrInfo.td | 4 ++-- llvm/test/MC/AsmParser/X86/x86_32-new-encoder.s | 10 ++++++++++ llvm/test/MC/AsmParser/X86/x86_64-new-encoder.s | 17 +++++++++++++++++ 5 files changed, 32 insertions(+), 3 deletions(-) diff --git a/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp b/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp index 1b5dccf8e9c4..484ffce8c6d6 100644 --- a/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp +++ b/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp @@ -627,6 +627,7 @@ ParseInstruction(StringRef Name, SMLoc NameLoc, .Case("repe", "rep") .Case("repz", "rep") .Case("repnz", "repne") + .Case("iret", "iretl") .Case("push", Is64Bit ? "pushq" : "pushl") .Case("pushf", Is64Bit ? "pushfq" : "pushfl") .Case("popf", Is64Bit ? "popfq" : "popfl") diff --git a/llvm/lib/Target/X86/X86Instr64bit.td b/llvm/lib/Target/X86/X86Instr64bit.td index 0884b61425e9..5f6c68bf8822 100644 --- a/llvm/lib/Target/X86/X86Instr64bit.td +++ b/llvm/lib/Target/X86/X86Instr64bit.td @@ -117,7 +117,8 @@ def ADJCALLSTACKUP64 : I<0, Pseudo, (outs), (ins i32imm:$amt1, i32imm:$amt2), } // Interrupt Instructions -def IRET64 : RI<0xcf, RawFrm, (outs), (ins), "iret{q}", []>; +def IRET64 : RI<0xcf, RawFrm, (outs), (ins), "iretq", []>, + Requires<[In64BitMode]>; //===----------------------------------------------------------------------===// // Call Instructions... diff --git a/llvm/lib/Target/X86/X86InstrInfo.td b/llvm/lib/Target/X86/X86InstrInfo.td index 58a7e2464c58..f50132b21706 100644 --- a/llvm/lib/Target/X86/X86InstrInfo.td +++ b/llvm/lib/Target/X86/X86InstrInfo.td @@ -601,8 +601,8 @@ def INT3 : I<0xcc, RawFrm, (outs), (ins), "int3", [(int_x86_int (i8 3))]>; def INT : Ii8<0xcd, RawFrm, (outs), (ins i8imm:$trap), "int\t$trap", [(int_x86_int imm:$trap)]>; -def IRET16 : I<0xcf, RawFrm, (outs), (ins), "iret{w}", []>, OpSize; -def IRET32 : I<0xcf, RawFrm, (outs), (ins), "iret{l}", []>; +def IRET16 : I<0xcf, RawFrm, (outs), (ins), "iretw", []>, OpSize; +def IRET32 : I<0xcf, RawFrm, (outs), (ins), "iret{l|d}", []>; // PIC base construction. This expands to code that looks like this: // call $next_inst diff --git a/llvm/test/MC/AsmParser/X86/x86_32-new-encoder.s b/llvm/test/MC/AsmParser/X86/x86_32-new-encoder.s index e4674b7b9806..e99af15a1da2 100644 --- a/llvm/test/MC/AsmParser/X86/x86_32-new-encoder.s +++ b/llvm/test/MC/AsmParser/X86/x86_32-new-encoder.s @@ -434,3 +434,13 @@ L1: // CHECK: jecxz L1 // CHECK: encoding: [0xe3,A] +// rdar://8403974 +iret +// CHECK: iretl +// CHECK: encoding: [0xcf] +iretw +// CHECK: iretw +// CHECK: encoding: [0x66,0xcf] +iretl +// CHECK: iretl +// CHECK: encoding: [0xcf] diff --git a/llvm/test/MC/AsmParser/X86/x86_64-new-encoder.s b/llvm/test/MC/AsmParser/X86/x86_64-new-encoder.s index 5fc29f11f9cd..75a424322b4b 100644 --- a/llvm/test/MC/AsmParser/X86/x86_64-new-encoder.s +++ b/llvm/test/MC/AsmParser/X86/x86_64-new-encoder.s @@ -185,3 +185,20 @@ rep movsl // CHECK: encoding: [0xf3] // CHECK: movsl // CHECK: encoding: [0xa5] + + +// rdar://8403974 +iret +// CHECK: iretl +// CHECK: encoding: [0xcf] +iretw +// CHECK: iretw +// CHECK: encoding: [0x66,0xcf] +iretl +// CHECK: iretl +// CHECK: encoding: [0xcf] +iretq +// CHECK: iretq +// CHECK: encoding: [0x48,0xcf] + +