[Alignment][NFC] Use 5 bits to store Instructions Alignment

As per [MaxAlignmentExponent]{b7338fb1a6/llvm/include/llvm/IR/Value.h (L688)} alignment is not allowed to be more than 2^29.
Encoded as Log2, this means that storing alignment uses 5 bits.
This patch makes sure all instructions store their alignment in a consistent way, encoded as Log2 and using 5 bits.

Differential Revision: https://reviews.llvm.org/D83119

llvm/include/llvm/IR/Instruction.h

@@ -54,6 +54,17 @@ protected:
   // The 15 first bits of `Value::SubclassData` are available for subclasses of
   // `Instruction` to use.
   using OpaqueField = Bitfield::Element<uint16_t, 0, 15>; // Next bit:15
+
+  // Template alias so that all Instruction storing alignment use the same
+  // definiton.
+  // Valid alignments are powers of two from 2^0 to 2^MaxAlignmentExponent =
+  // 2^29. We store them as Log2(Alignment), so we need 5 bits to encode the 30
+  // possible values.
+  template <unsigned Offset>
+  using AlignmentBitfieldElement =
+      typename Bitfield::Element<unsigned, Offset, 5,
+                                 Value::MaxAlignmentExponent>;
+
 private:
   // The last bit is used to store whether the instruction has metadata attached
   // or not.

llvm/include/llvm/IR/Instructions.h

@@ -60,7 +60,7 @@ class LLVMContext;
 class AllocaInst : public UnaryInstruction {
   Type *AllocatedType;
 
-  using AlignmentField = Bitfield::Element<unsigned, 0, 5>;    // Next bit:5
+  using AlignmentField = AlignmentBitfieldElement<0>;          // Next bit:5
   using UsedWithInAllocaField = Bitfield::Element<bool, 5, 1>; // Next bit:6
   using SwiftErrorField = Bitfield::Element<bool, 6, 1>;       // Next bit:7
 
@@ -113,11 +113,15 @@ public:
   /// Return the alignment of the memory that is being allocated by the
   /// instruction.
   Align getAlign() const {
-    return *decodeMaybeAlign(getSubclassData<AlignmentField>());
+    return Align(1ULL << getSubclassData<AlignmentField>());
   }
+
+  void setAlignment(Align Align) {
+    setSubclassData<AlignmentField>(Log2(Align));
+  }
+
   // FIXME: Remove this one transition to Align is over.
   unsigned getAlignment() const { return getAlign().value(); }
-  void setAlignment(Align Align);
 
   /// Return true if this alloca is in the entry block of the function and is a
   /// constant size. If so, the code generator will fold it into the
@@ -165,9 +169,9 @@ private:
 /// Value to store whether or not the load is volatile.
 class LoadInst : public UnaryInstruction {
   using VolatileField = Bitfield::Element<bool, 0, 1>;      // Next bit:1
-  using AlignmentField = Bitfield::Element<unsigned, 1, 6>; // Next bit:7
+  using AlignmentField = AlignmentBitfieldElement<1>;       // Next bit:6
-  using OrderingField = Bitfield::Element<AtomicOrdering, 7, 3,
+  using OrderingField = Bitfield::Element<AtomicOrdering, 6, 3,
-                                          AtomicOrdering::LAST>; // Next bit:10
+                                          AtomicOrdering::LAST>; // Next bit:9
 
   void AssertOK();
 
@@ -210,10 +214,12 @@ public:
 
   /// Return the alignment of the access that is being performed.
   Align getAlign() const {
-    return *decodeMaybeAlign(getSubclassData<AlignmentField>());
+    return Align(1ULL << (getSubclassData<AlignmentField>()));
   }
 
-  void setAlignment(Align Alignment);
+  void setAlignment(Align Align) {
+    setSubclassData<AlignmentField>(Log2(Align));
+  }
 
   /// Returns the ordering constraint of this load instruction.
   AtomicOrdering getOrdering() const {
@@ -290,9 +296,9 @@ private:
 /// An instruction for storing to memory.
 class StoreInst : public Instruction {
   using VolatileField = Bitfield::Element<bool, 0, 1>;      // Next bit:1
-  using AlignmentField = Bitfield::Element<unsigned, 1, 6>; // Next bit:7
+  using AlignmentField = AlignmentBitfieldElement<1>;       // Next bit:6
-  using OrderingField = Bitfield::Element<AtomicOrdering, 7, 3,
+  using OrderingField = Bitfield::Element<AtomicOrdering, 6, 3,
-                                          AtomicOrdering::LAST>; // Next bit:10
+                                          AtomicOrdering::LAST>; // Next bit:9
 
   void AssertOK();
 
@@ -337,10 +343,12 @@ public:
   unsigned getAlignment() const { return getAlign().value(); }
 
   Align getAlign() const {
-    return *decodeMaybeAlign(getSubclassData<AlignmentField>());
+    return Align(1ULL << (getSubclassData<AlignmentField>()));
   }
 
-  void setAlignment(Align Alignment);
+  void setAlignment(Align Align) {
+    setSubclassData<AlignmentField>(Log2(Align));
+  }
 
   /// Returns the ordering constraint of this store instruction.
   AtomicOrdering getOrdering() const {

llvm/lib/IR/Instructions.cpp

@@ -1297,11 +1297,6 @@ AllocaInst::AllocaInst(Type *Ty, unsigned AddrSpace, Value *ArraySize,
   setName(Name);
 }
 
-void AllocaInst::setAlignment(Align Align) {
-  assert(Align <= MaximumAlignment &&
-         "Alignment is greater than MaximumAlignment!");
-  setSubclassData<AlignmentField>(encode(Align));
-}
 
 bool AllocaInst::isArrayAllocation() const {
   if (ConstantInt *CI = dyn_cast<ConstantInt>(getOperand(0)))
@@ -1393,12 +1388,6 @@ LoadInst::LoadInst(Type *Ty, Value *Ptr, const Twine &Name, bool isVolatile,
   setName(Name);
 }
 
-void LoadInst::setAlignment(Align Align) {
-  assert(Align <= MaximumAlignment &&
-         "Alignment is greater than MaximumAlignment!");
-  setSubclassData<AlignmentField>(encode(Align));
-}
-
 //===----------------------------------------------------------------------===//
 //                           StoreInst Implementation
 //===----------------------------------------------------------------------===//
@@ -1470,11 +1459,6 @@ StoreInst::StoreInst(Value *val, Value *addr, bool isVolatile, Align Align,
   AssertOK();
 }
 
-void StoreInst::setAlignment(Align Alignment) {
-  assert(Alignment <= MaximumAlignment &&
-         "Alignment is greater than MaximumAlignment!");
-  setSubclassData<AlignmentField>(encode(Alignment));
-}
 
 //===----------------------------------------------------------------------===//
 //                       AtomicCmpXchgInst Implementation