Minor fixes: renamed target machine files; fold sched info into TargetMachine.

llvm-svn: 603
This commit is contained in:
Vikram S. Adve 2001-09-18 12:41:43 +00:00
parent f95d8d430f
commit 06225084b9
5 changed files with 33 additions and 32 deletions

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@ -1,25 +1,25 @@
/* $Id$ -*-c++-*-
****************************************************************************
* File:
* InstrForest.h
*
* Purpose:
* Convert SSA graph to instruction trees for instruction selection.
*
* Strategy:
* The basic idea is that we would like to group instructions into a single
* tree if one or more of them might be potentially combined into a single
* complex instruction in the target machine.
* Since this grouping is completely machine-independent, it is as
* aggressive as possible. In particular, we group two instructions
* O and I if:
* (1) Instruction O computes an operand of instruction I, and
* (2) O and I are part of the same basic block, and
* (3) O has only a single use, viz., I.
*
* History:
* 6/28/01 - Vikram Adve - Created
***************************************************************************/
// $Id$ -*-c++-*-
//***************************************************************************
// File:
// InstrForest.h
//
// Purpose:
// Convert SSA graph to instruction trees for instruction selection.
//
// Strategy:
// The basic idea is that we would like to group instructions into a single
// tree if one or more of them might be potentially combined into a single
// complex instruction in the target machine.
// Since this grouping is completely machine-independent, it is as
// aggressive as possible. In particular, we group two instructions
// O and I if:
// (1) Instruction O computes an operand of instruction I, and
// (2) O and I are part of the same basic block, and
// (3) O has only a single use, viz., I.
//
// History:
// 6/28/01 - Vikram Adve - Created
//**************************************************************************/
#ifndef LLVM_CODEGEN_INSTRFOREST_H
#define LLVM_CODEGEN_INSTRFOREST_H
@ -235,11 +235,13 @@ protected:
//------------------------------------------------------------------------
class InstrForest : private hash_map<const Instruction*, InstructionNode*> {
private:
hash_set<InstructionNode*> treeRoots;
public:
InstrForest(Method *M);
/*ctor*/ InstrForest (Method *M);
/*dtor*/ ~InstrForest ();
inline InstructionNode *getTreeNodeForInstr(Instruction* instr) {
return (*this)[instr];
}

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@ -42,8 +42,8 @@ extern cl::Enum<SchedDebugLevel_t> SchedDebugLevel;
// are still in SSA form.
//---------------------------------------------------------------------------
bool ScheduleInstructionsWithSSA(Method* method, const TargetMachine &Target,
const MachineSchedInfo &schedInfo);
bool ScheduleInstructionsWithSSA(Method* method, const TargetMachine &Target);
//---------------------------------------------------------------------------
// Function: ScheduleInstructions

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@ -19,7 +19,7 @@
#include "llvm/CodeGen/InstrForest.h"
#include "llvm/Support/DataTypes.h"
#include "llvm/Support/NonCopyable.h"
#include "llvm/Target/InstInfo.h"
#include "llvm/Target/MachineInstrInfo.h"
template<class _MI, class _V> class ValOpIterator;
@ -86,7 +86,6 @@ private:
unsigned int regNum; // register number for an explicit register
// will be set for a value after reg allocation
bool isDef; // is this a defition for the value
// made public for faster access
public:
/*ctor*/ MachineOperand ();

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@ -21,8 +21,8 @@
#include "llvm/CodeGen/IGNode.h"
#include "llvm/CodeGen/InterferenceGraph.h"
#include "llvm/Target/Machine.h"
#include "llvm/Target/RegInfo.h"
#include "llvm/Target/TargetMachine.h"
#include "llvm/Target/MachineRegInfo.h"
#include <stack>
typedef vector<unsigned int> ReservedColorListType;

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@ -21,8 +21,8 @@
#include "llvm/CodeGen/IGNode.h"
#include "llvm/CodeGen/InterferenceGraph.h"
#include "llvm/Target/Machine.h"
#include "llvm/Target/RegInfo.h"
#include "llvm/Target/TargetMachine.h"
#include "llvm/Target/MachineRegInfo.h"
#include <stack>
typedef vector<unsigned int> ReservedColorListType;