diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index 12b6cf390183..eedffaf7166c 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -8880,8 +8880,8 @@ static SDValue lowerVectorShuffleToEXPAND(const SDLoc &DL, MVT VT, static bool matchVectorShuffleWithUNPCK(MVT VT, SDValue &V1, SDValue &V2, unsigned &UnpackOpcode, bool IsUnary, - ArrayRef TargetMask, SDLoc &DL, - SelectionDAG &DAG, + ArrayRef TargetMask, + const SDLoc &DL, SelectionDAG &DAG, const X86Subtarget &Subtarget) { int NumElts = VT.getVectorNumElements(); @@ -27987,7 +27987,8 @@ bool X86TargetLowering::isGAPlusOffset(SDNode *N, // TODO: Investigate sharing more of this with shuffle lowering. static bool matchUnaryVectorShuffle(MVT MaskVT, ArrayRef Mask, bool AllowFloatDomain, bool AllowIntDomain, - SDValue &V1, SDLoc &DL, SelectionDAG &DAG, + SDValue &V1, const SDLoc &DL, + SelectionDAG &DAG, const X86Subtarget &Subtarget, unsigned &Shuffle, MVT &SrcVT, MVT &DstVT) { unsigned NumMaskElts = Mask.size(); @@ -28235,7 +28236,7 @@ static bool matchUnaryPermuteVectorShuffle(MVT MaskVT, ArrayRef Mask, // TODO: Investigate sharing more of this with shuffle lowering. static bool matchBinaryVectorShuffle(MVT MaskVT, ArrayRef Mask, bool AllowFloatDomain, bool AllowIntDomain, - SDValue &V1, SDValue &V2, SDLoc &DL, + SDValue &V1, SDValue &V2, const SDLoc &DL, SelectionDAG &DAG, const X86Subtarget &Subtarget, unsigned &Shuffle, MVT &SrcVT, MVT &DstVT, @@ -28299,15 +28300,11 @@ static bool matchBinaryVectorShuffle(MVT MaskVT, ArrayRef Mask, return false; } -static bool matchBinaryPermuteVectorShuffle(MVT MaskVT, ArrayRef Mask, - const APInt &Zeroable, - bool AllowFloatDomain, - bool AllowIntDomain, - SDValue &V1, SDValue &V2, SDLoc &DL, - SelectionDAG &DAG, - const X86Subtarget &Subtarget, - unsigned &Shuffle, MVT &ShuffleVT, - unsigned &PermuteImm) { +static bool matchBinaryPermuteVectorShuffle( + MVT MaskVT, ArrayRef Mask, const APInt &Zeroable, + bool AllowFloatDomain, bool AllowIntDomain, SDValue &V1, SDValue &V2, + const SDLoc &DL, SelectionDAG &DAG, const X86Subtarget &Subtarget, + unsigned &Shuffle, MVT &ShuffleVT, unsigned &PermuteImm) { unsigned NumMaskElts = Mask.size(); unsigned EltSizeInBits = MaskVT.getScalarSizeInBits();