forked from OSchip/llvm-project
X86: sub_xmm registers are 128 bits wide.
llvm-svn: 183103
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@ -25,7 +25,7 @@ let Namespace = "X86" in {
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def sub_8bit_hi : SubRegIndex<8, 8>;
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def sub_16bit : SubRegIndex<16>;
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def sub_32bit : SubRegIndex<32>;
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def sub_xmm : SubRegIndex<64>;
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def sub_xmm : SubRegIndex<128>;
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}
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//===----------------------------------------------------------------------===//
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