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Fix PR1842. 

llvm-svn: 44649
This commit is contained in:
Dale Johannesen 2007-12-06 01:43:46 +00:00
parent c277f6f351
commit 05bbbda78a
1 changed files with 16 additions and 4 deletions
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20
llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
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@ -2396,6 +2396,10 @@ SDOperand DAGCombiner::visitSELECT(SDNode *N) {
MVT::ValueType VT = N->getValueType(0);
MVT::ValueType VT0 = N0.getValueType();
// Some targets have SETCC types bigger than 1 bit, but do not set all the
// bits to 1; identified by getSetCCResultContents. Watch out for these.
// fold select C, X, X -> X
if (N1 == N2)
return N1;
@ -2420,14 +2424,22 @@ SDOperand DAGCombiner::visitSELECT(SDNode *N) {
return DAG.getNode(ISD::TRUNCATE, VT, XORNode);
}
// fold select C, 0, X -> ~C & X
if (VT == VT0 && N1C && N1C->isNullValue()) {
SDOperand XORNode = DAG.getNode(ISD::XOR, VT, N0, DAG.getConstant(1, VT));
if (VT == VT0 && N1C && N1C->isNullValue() &&
(N0.Val->getOpcode()!=ISD::SETCC || VT==MVT::i1 ||
TLI.getSetCCResultContents()==
TargetLowering::ZeroOrNegativeOneSetCCResult)) {
SDOperand XORNode;
XORNode = DAG.getNode(ISD::XOR, VT, N0, DAG.getConstant(~0UL, VT));
AddToWorkList(XORNode.Val);
return DAG.getNode(ISD::AND, VT, XORNode, N2);
}
// fold select C, X, 1 -> ~C | X
if (VT == VT0 && N2C && N2C->getValue() == 1) {
SDOperand XORNode = DAG.getNode(ISD::XOR, VT, N0, DAG.getConstant(1, VT));
if (VT == VT0 && N2C && N2C->getValue() == 1 &&
(N0.Val->getOpcode()!=ISD::SETCC || VT==MVT::i1 ||
TLI.getSetCCResultContents()==
TargetLowering::ZeroOrNegativeOneSetCCResult)) {
SDOperand XORNode;
XORNode = DAG.getNode(ISD::XOR, VT, N0, DAG.getConstant(~0UL, VT));
AddToWorkList(XORNode.Val);
return DAG.getNode(ISD::OR, VT, XORNode, N1);
}