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[AArch64] Add a fp128 shuffle test. NFC 

These legalize to scalar types, so it's useful to have a test case that
covers them.
This commit is contained in:
David Green 2022-04-28 14:28:45 +01:00
parent c792884589
commit 05b0a49832
1 changed files with 3 additions and 0 deletions
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3
llvm/test/Analysis/CostModel/AArch64/shuffle-other.ll
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@ -15,6 +15,7 @@ define void @shuffle() {
; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v15 = shufflevector <4 x i32> undef, <4 x i32> undef, <4 x i32> <i32 1, i32 3, i32 2, i32 0>
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16 = shufflevector <2 x float> undef, <2 x float> undef, <2 x i32> <i32 1, i32 0>
; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v17 = shufflevector <4 x float> undef, <4 x float> undef, <4 x i32> <i32 1, i32 3, i32 2, i32 0>
; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %v18 = shufflevector <2 x fp128> undef, <2 x fp128> undef, <2 x i32> <i32 1, i32 0>
; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
;
%v7 = shufflevector <2 x i8> undef, <2 x i8> undef, <2 x i32> <i32 1, i32 0>
@ -33,6 +34,8 @@ define void @shuffle() {
%v16 = shufflevector <2 x float> undef, <2 x float> undef, <2 x i32> <i32 1, i32 0>
%v17 = shufflevector <4 x float> undef, <4 x float> undef, <4 x i32> <i32 1, i32 3, i32 2, i32 0>
%v18 = shufflevector <2 x fp128> undef, <2 x fp128> undef, <2 x i32> <i32 1, i32 0>
ret void
}