forked from OSchip/llvm-project
Allow data prefetch into non-default address space
I am playing with the LoopDataPrefetch pass and found out that it bails to work with a pointer in a non-zero address space. This patch adds the target callback to check if an address space is to be considered for prefetching. Default implementation still only allows address space 0, so this is NFCI. This does not currently affect any known targets, but seems to be generally useful for the future. Differential Revision: https://reviews.llvm.org/D129795
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@ -1042,6 +1042,9 @@ public:
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/// \return True if prefetching should also be done for writes.
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bool enableWritePrefetching() const;
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/// \return if target want to issue a prefetch in address space \p AS.
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bool shouldPrefetchAddressSpace(unsigned AS) const;
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/// \return The maximum interleave factor that any transform should try to
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/// perform for this target. This number depends on the level of parallelism
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/// and the number of execution units in the CPU.
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@ -1705,6 +1708,9 @@ public:
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/// \return True if prefetching should also be done for writes.
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virtual bool enableWritePrefetching() const = 0;
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/// \return if target want to issue a prefetch in address space \p AS.
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virtual bool shouldPrefetchAddressSpace(unsigned AS) const = 0;
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virtual unsigned getMaxInterleaveFactor(unsigned VF) = 0;
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virtual InstructionCost getArithmeticInstrCost(
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unsigned Opcode, Type *Ty, TTI::TargetCostKind CostKind,
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@ -2231,6 +2237,11 @@ public:
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return Impl.enableWritePrefetching();
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}
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/// \return if target want to issue a prefetch in address space \p AS.
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bool shouldPrefetchAddressSpace(unsigned AS) const override {
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return Impl.shouldPrefetchAddressSpace(AS);
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}
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unsigned getMaxInterleaveFactor(unsigned VF) override {
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return Impl.getMaxInterleaveFactor(VF);
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}
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@ -475,6 +475,7 @@ public:
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}
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unsigned getMaxPrefetchIterationsAhead() const { return UINT_MAX; }
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bool enableWritePrefetching() const { return false; }
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bool shouldPrefetchAddressSpace(unsigned AS) const { return !AS; }
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unsigned getMaxInterleaveFactor(unsigned VF) const { return 1; }
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@ -683,6 +683,10 @@ public:
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return getST()->enableWritePrefetching();
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}
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virtual bool shouldPrefetchAddressSpace(unsigned AS) const {
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return getST()->shouldPrefetchAddressSpace(AS);
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}
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/// @}
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/// \name Vector TTI Implementations
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@ -282,6 +282,9 @@ public:
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unsigned NumStridedMemAccesses,
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unsigned NumPrefetches,
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bool HasCall) const;
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/// \return if target want to issue a prefetch in address space \p AS.
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virtual bool shouldPrefetchAddressSpace(unsigned AS) const;
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};
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} // end namespace llvm
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@ -704,6 +704,10 @@ bool TargetTransformInfo::enableWritePrefetching() const {
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return TTIImpl->enableWritePrefetching();
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}
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bool TargetTransformInfo::shouldPrefetchAddressSpace(unsigned AS) const {
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return TTIImpl->shouldPrefetchAddressSpace(AS);
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}
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unsigned TargetTransformInfo::getMaxInterleaveFactor(unsigned VF) const {
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return TTIImpl->getMaxInterleaveFactor(VF);
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}
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@ -366,3 +366,7 @@ unsigned MCSubtargetInfo::getMinPrefetchStride(unsigned NumMemAccesses,
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bool HasCall) const {
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return 1;
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}
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bool MCSubtargetInfo::shouldPrefetchAddressSpace(unsigned AS) const {
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return !AS;
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}
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@ -338,7 +338,7 @@ bool LoopDataPrefetch::runOnLoop(Loop *L) {
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} else continue;
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unsigned PtrAddrSpace = PtrValue->getType()->getPointerAddressSpace();
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if (PtrAddrSpace)
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if (!TTI->shouldPrefetchAddressSpace(PtrAddrSpace))
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continue;
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NumMemAccesses++;
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if (L->isLoopInvariant(PtrValue))
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@ -398,7 +398,8 @@ bool LoopDataPrefetch::runOnLoop(Loop *L) {
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if (!SCEVE.isSafeToExpand(NextLSCEV))
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continue;
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Type *I8Ptr = Type::getInt8PtrTy(BB->getContext(), 0/*PtrAddrSpace*/);
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unsigned PtrAddrSpace = NextLSCEV->getType()->getPointerAddressSpace();
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Type *I8Ptr = Type::getInt8PtrTy(BB->getContext(), PtrAddrSpace);
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Value *PrefPtrValue = SCEVE.expandCodeFor(NextLSCEV, I8Ptr, P.InsertPt);
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IRBuilder<> Builder(P.InsertPt);
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