forked from OSchip/llvm-project
Correct ARM NOP encoding
The encoding of NOP in ARMAsmBackend.cpp is missing a trailing zero, which causes the emission of a coprocessor instruction rather than "mov r0, r0" as indicated in the comment. The test also checks for the wrong encoding. http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20121203/157919.html llvm-svn: 169420
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@ -220,7 +220,7 @@ void ARMAsmBackend::relaxInstruction(const MCInst &Inst, MCInst &Res) const {
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bool ARMAsmBackend::writeNopData(uint64_t Count, MCObjectWriter *OW) const {
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const uint16_t Thumb1_16bitNopEncoding = 0x46c0; // using MOV r8,r8
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const uint16_t Thumb2_16bitNopEncoding = 0xbf00; // NOP
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const uint32_t ARMv4_NopEncoding = 0xe1a0000; // using MOV r0,r0
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const uint32_t ARMv4_NopEncoding = 0xe1a00000; // using MOV r0,r0
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const uint32_t ARMv6T2_NopEncoding = 0xe320f000; // NOP
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if (isThumb()) {
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const uint16_t nopEncoding = hasNOP() ? Thumb2_16bitNopEncoding
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@ -7,4 +7,4 @@ x:
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.align 4
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add r0, r1, r2
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@ CHECK: ('_section_data', '020081e0 00001a0e 00001a0e 00001a0e 020081e0')
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@ CHECK: ('_section_data', '020081e0 0000a0e1 0000a0e1 0000a0e1 020081e0')
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