diff --git a/llvm/include/llvm/Target/MachineInstrInfo.h b/llvm/include/llvm/Target/MachineInstrInfo.h
index f4a6a7714cc3..ea16d3dfd8f4 100644
--- a/llvm/include/llvm/Target/MachineInstrInfo.h
+++ b/llvm/include/llvm/Target/MachineInstrInfo.h
@@ -85,6 +85,12 @@ public:
   MachineInstrInfo(const MachineInstrDescriptor *desc, unsigned descSize,
 		   unsigned numRealOpCodes);
   virtual ~MachineInstrInfo();
+
+  // Invariant: All instruction sets use opcode #0 as the PHI instruction and
+  // opcode #1 as the noop instruction.
+  enum {
+    PHI = 0, NOOP = 1
+  };
   
   unsigned getNumRealOpCodes()  const { return numRealOpCodes; }
   unsigned getNumTotalOpCodes() const { return descSize; }
diff --git a/llvm/include/llvm/Target/TargetInstrInfo.h b/llvm/include/llvm/Target/TargetInstrInfo.h
index f4a6a7714cc3..ea16d3dfd8f4 100644
--- a/llvm/include/llvm/Target/TargetInstrInfo.h
+++ b/llvm/include/llvm/Target/TargetInstrInfo.h
@@ -85,6 +85,12 @@ public:
   MachineInstrInfo(const MachineInstrDescriptor *desc, unsigned descSize,
 		   unsigned numRealOpCodes);
   virtual ~MachineInstrInfo();
+
+  // Invariant: All instruction sets use opcode #0 as the PHI instruction and
+  // opcode #1 as the noop instruction.
+  enum {
+    PHI = 0, NOOP = 1
+  };
   
   unsigned getNumRealOpCodes()  const { return numRealOpCodes; }
   unsigned getNumTotalOpCodes() const { return descSize; }