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[X86][Costmodel] Load/store i16 Stride=3 VF=4 interleaving costs 

The only sched models that for cpu's that support avx2
but not avx512 are: haswell, broadwell, skylake, zen1-3

For load we have:
https://godbolt.org/z/sP4j1173f - for intels `Block RThroughput: =7.0`; for ryzens, `Block RThroughput: <=3.0`
So pick cost of `7`.

For store we have:
https://godbolt.org/z/sP4j1173f - for intels `Block RThroughput: =6.0`; for ryzens, `Block RThroughput: <=2.0`
So pick cost of `6`.

I'm directly using the shuffling asm the llc produced,
without any manual fixups that may be needed
to ensure sequential execution.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D111015
This commit is contained in:
Roman Lebedev 2021-10-03 23:37:13 +03:00
parent 8e8fb77aa4
commit 04f1469cb4
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GPG Key ID: 083C3EBB4A1689E0
3 changed files with 4 additions and 2 deletions
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2
llvm/lib/Target/X86/X86TargetTransformInfo.cpp
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@ -5101,6 +5101,7 @@ InstructionCost X86TTIImpl::getInterleavedMemoryOpCostAVX2(
{3, MVT::v32i8, 14}, // (load 96i8 and) deinterleave into 3 x 32i8
{3, MVT::v2i16, 5}, // (load 6i16 and) deinterleave into 3 x 2i16
{3, MVT::v4i16, 7}, // (load 12i16 and) deinterleave into 3 x 4i16
{3, MVT::v8i32, 17}, // (load 24i32 and) deinterleave into 3 x 8i32
@ -5161,6 +5162,7 @@ InstructionCost X86TTIImpl::getInterleavedMemoryOpCostAVX2(
{3, MVT::v32i8, 13}, // interleave 3 x 32i8 into 96i8 (and store)
{3, MVT::v2i16, 4}, // interleave 3 x 2i16 into 6i16 (and store)
{3, MVT::v4i16, 6}, // interleave 3 x 4i16 into 12i16 (and store)
{4, MVT::v2i8, 4}, // interleave 4 x 2i8 into 8i8 (and store)
{4, MVT::v4i8, 4}, // interleave 4 x 4i8 into 16i8 (and store)

2
llvm/test/Analysis/CostModel/X86/interleaved-load-i16-stride-3.ll
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@ -27,7 +27,7 @@ target triple = "x86_64-unknown-linux-gnu"
;
; AVX2: LV: Found an estimated cost of 1 for VF 1 For instruction: %v0 = load i16, i16* %in0, align 2
; AVX2: LV: Found an estimated cost of 8 for VF 2 For instruction: %v0 = load i16, i16* %in0, align 2
; AVX2: LV: Found an estimated cost of 31 for VF 4 For instruction: %v0 = load i16, i16* %in0, align 2
; AVX2: LV: Found an estimated cost of 10 for VF 4 For instruction: %v0 = load i16, i16* %in0, align 2
; AVX2: LV: Found an estimated cost of 58 for VF 8 For instruction: %v0 = load i16, i16* %in0, align 2
; AVX2: LV: Found an estimated cost of 129 for VF 16 For instruction: %v0 = load i16, i16* %in0, align 2
; AVX2: LV: Found an estimated cost of 258 for VF 32 For instruction: %v0 = load i16, i16* %in0, align 2

2
llvm/test/Analysis/CostModel/X86/interleaved-store-i16-stride-3.ll
View File

@ -27,7 +27,7 @@ target triple = "x86_64-unknown-linux-gnu"
;
; AVX2: LV: Found an estimated cost of 1 for VF 1 For instruction: store i16 %v2, i16* %out2, align 2
; AVX2: LV: Found an estimated cost of 7 for VF 2 For instruction: store i16 %v2, i16* %out2, align 2
; AVX2: LV: Found an estimated cost of 30 for VF 4 For instruction: store i16 %v2, i16* %out2, align 2
; AVX2: LV: Found an estimated cost of 9 for VF 4 For instruction: store i16 %v2, i16* %out2, align 2
; AVX2: LV: Found an estimated cost of 53 for VF 8 For instruction: store i16 %v2, i16* %out2, align 2
; AVX2: LV: Found an estimated cost of 129 for VF 16 For instruction: store i16 %v2, i16* %out2, align 2
; AVX2: LV: Found an estimated cost of 258 for VF 32 For instruction: store i16 %v2, i16* %out2, align 2