[AArch64] Add -mgeneral_regs_only option.

llvm-svn: 199904
This commit is contained in:
Amara Emerson 2014-01-23 15:48:30 +00:00
parent 742b90c3ed
commit 04e2ecfda2
5 changed files with 24 additions and 9 deletions

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@ -1061,6 +1061,13 @@ are listed below.
CRC instructions are enabled by default on ARMv8.
.. option:: -mgeneral_regs_only
Generate code which only uses the general purpose registers.
This option restricts the generated code to use general registers
only. This only applies to the AArch64 architecture.
Controlling Size of Debug Information
-------------------------------------

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@ -72,6 +72,7 @@ def m_Group : OptionGroup<"<m group>">, Group<CompileOnly_Group>;
def m_x86_Features_Group : OptionGroup<"<m x86 features group>">, Group<m_Group>;
def m_hexagon_Features_Group : OptionGroup<"<m hexagon features group>">, Group<m_Group>;
def m_arm_Features_Group : OptionGroup<"<m arm features group>">, Group<m_Group>;
def m_aarch64_Features_Group : OptionGroup<"<m aarch64 features group>">, Group<m_Group>;
def m_ppc_Features_Group : OptionGroup<"<m ppc features group>">, Group<m_Group>;
def u_Group : OptionGroup<"<u group>">;
@ -1053,6 +1054,9 @@ def mcrc : Flag<["-"], "mcrc">, Group<m_arm_Features_Group>,
def mnocrc : Flag<["-"], "mnocrc">, Group<m_arm_Features_Group>,
HelpText<"Disallow use of CRC instructions (ARM only)">;
def mgeneral_regs_only : Flag<["-"], "mgeneral_regs_only">, Group<m_aarch64_Features_Group>,
HelpText<"Generate code which only uses the general purpose registers (AArch64 only)">;
def mvsx : Flag<["-"], "mvsx">, Group<m_ppc_Features_Group>;
def mno_vsx : Flag<["-"], "mno-vsx">, Group<m_ppc_Features_Group>;
def mfprnd : Flag<["-"], "mfprnd">, Group<m_ppc_Features_Group>;

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@ -515,10 +515,6 @@ static void getAArch64FPUFeatures(const Driver &D, const Arg *A,
Features.push_back("+crypto");
} else if (FPU == "neon") {
Features.push_back("+neon");
} else if (FPU == "none") {
Features.push_back("-fp-armv8");
Features.push_back("-crypto");
Features.push_back("-neon");
} else
D.Diag(diag::err_drv_clang_unsupported) << A->getAsString(Args);
}
@ -1438,6 +1434,12 @@ static void getAArch64TargetFeatures(const Driver &D, const ArgList &Args,
// Honor -mfpu=.
if (const Arg *A = Args.getLastArg(options::OPT_mfpu_EQ))
getAArch64FPUFeatures(D, A, Args, Features);
if (Args.getLastArg(options::OPT_mgeneral_regs_only)) {
Features.push_back("-fp-armv8");
Features.push_back("-crypto");
Features.push_back("-neon");
}
}
static void getTargetFeatures(const Driver &D, const llvm::Triple &Triple,

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@ -19,8 +19,3 @@
// CHECK-CRYPTO-NEON-FP-ARMV8: "-target-feature" "+neon"
// CHECK-CRYPTO-NEON-FP-ARMV8: "-target-feature" "+crypto"
// RUN: %clang -target aarch64-linux-eabi -mfpu=none %s -### 2>&1 \
// RUN: | FileCheck --check-prefix=CHECK-NO-FP %s
// CHECK-NO-FP: "-target-feature" "-fp-armv8"
// CHECK-NO-FP: "-target-feature" "-crypto"
// CHECK-NO-FP: "-target-feature" "-neon"

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@ -0,0 +1,7 @@
// Test the -mgeneral_regs_only option
// RUN: %clang -target aarch64-linux-eabi -mgeneral_regs_only %s -### 2>&1 \
// RUN: | FileCheck --check-prefix=CHECK-NO-FP %s
// CHECK-NO-FP: "-target-feature" "-fp-armv8"
// CHECK-NO-FP: "-target-feature" "-crypto"
// CHECK-NO-FP: "-target-feature" "-neon"