[InstCombine] move/add tests for not+sub; NFC

llvm-svn: 341291
This commit is contained in:
Sanjay Patel 2018-09-02 19:18:13 +00:00
parent e0dcc28a4d
commit 04ab22b3f4
2 changed files with 84 additions and 34 deletions

View File

@ -1,8 +1,9 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt < %s -instcombine -S | FileCheck %s
define i32 @test1(i32 %A) {
; CHECK-LABEL: @test1(
; CHECK-NEXT: ret i32 %A
; CHECK-NEXT: ret i32 [[A:%.*]]
;
%B = xor i32 %A, -1
%C = xor i32 %B, -1
@ -11,7 +12,7 @@ define i32 @test1(i32 %A) {
define i1 @invert_icmp(i32 %A, i32 %B) {
; CHECK-LABEL: @invert_icmp(
; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 %A, %B
; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[A:%.*]], [[B:%.*]]
; CHECK-NEXT: ret i1 [[CMP]]
;
%cmp = icmp sle i32 %A, %B
@ -23,7 +24,7 @@ define i1 @invert_icmp(i32 %A, i32 %B) {
define i1 @invert_fcmp(float %X, float %Y) {
; CHECK-LABEL: @invert_fcmp(
; CHECK-NEXT: [[CMP:%.*]] = fcmp uge float %X, %Y
; CHECK-NEXT: [[CMP:%.*]] = fcmp uge float [[X:%.*]], [[Y:%.*]]
; CHECK-NEXT: ret i1 [[CMP]]
;
%cmp = fcmp olt float %X, %Y
@ -35,7 +36,7 @@ define i1 @invert_fcmp(float %X, float %Y) {
define i1 @not_not_cmp(i32 %a, i32 %b) {
; CHECK-LABEL: @not_not_cmp(
; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 %b, %a
; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[B:%.*]], [[A:%.*]]
; CHECK-NEXT: ret i1 [[CMP]]
;
%nota = xor i32 %a, -1
@ -46,7 +47,7 @@ define i1 @not_not_cmp(i32 %a, i32 %b) {
define <2 x i1> @not_not_cmp_vector(<2 x i32> %a, <2 x i32> %b) {
; CHECK-LABEL: @not_not_cmp_vector(
; CHECK-NEXT: [[CMP:%.*]] = icmp ugt <2 x i32> %b, %a
; CHECK-NEXT: [[CMP:%.*]] = icmp ugt <2 x i32> [[B:%.*]], [[A:%.*]]
; CHECK-NEXT: ret <2 x i1> [[CMP]]
;
%nota = xor <2 x i32> %a, <i32 -1, i32 -1>
@ -57,7 +58,7 @@ define <2 x i1> @not_not_cmp_vector(<2 x i32> %a, <2 x i32> %b) {
define i1 @not_cmp_constant(i32 %a) {
; CHECK-LABEL: @not_cmp_constant(
; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 %a, -43
; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[A:%.*]], -43
; CHECK-NEXT: ret i1 [[CMP]]
;
%nota = xor i32 %a, -1
@ -67,7 +68,7 @@ define i1 @not_cmp_constant(i32 %a) {
define <2 x i1> @not_cmp_constant_vector(<2 x i32> %a) {
; CHECK-LABEL: @not_cmp_constant_vector(
; CHECK-NEXT: [[CMP:%.*]] = icmp sgt <2 x i32> %a, <i32 -43, i32 -43>
; CHECK-NEXT: [[CMP:%.*]] = icmp sgt <2 x i32> [[A:%.*]], <i32 -43, i32 -43>
; CHECK-NEXT: ret <2 x i1> [[CMP]]
;
%nota = xor <2 x i32> %a, <i32 -1, i32 -1>
@ -77,7 +78,7 @@ define <2 x i1> @not_cmp_constant_vector(<2 x i32> %a) {
define <2 x i1> @test7(<2 x i32> %A, <2 x i32> %B) {
; CHECK-LABEL: @test7(
; CHECK-NEXT: [[COND:%.*]] = icmp sgt <2 x i32> %A, %B
; CHECK-NEXT: [[COND:%.*]] = icmp sgt <2 x i32> [[A:%.*]], [[B:%.*]]
; CHECK-NEXT: ret <2 x i1> [[COND]]
;
%cond = icmp sle <2 x i32> %A, %B
@ -87,7 +88,7 @@ define <2 x i1> @test7(<2 x i32> %A, <2 x i32> %B) {
define i32 @not_ashr_not(i32 %A, i32 %B) {
; CHECK-LABEL: @not_ashr_not(
; CHECK-NEXT: [[NOT2:%.*]] = ashr i32 %A, %B
; CHECK-NEXT: [[NOT2:%.*]] = ashr i32 [[A:%.*]], [[B:%.*]]
; CHECK-NEXT: ret i32 [[NOT2]]
;
%not1 = xor i32 %A, -1
@ -98,7 +99,7 @@ define i32 @not_ashr_not(i32 %A, i32 %B) {
define i8 @not_ashr_const(i8 %x) {
; CHECK-LABEL: @not_ashr_const(
; CHECK-NEXT: [[NOT:%.*]] = lshr i8 41, %x
; CHECK-NEXT: [[NOT:%.*]] = lshr i8 41, [[X:%.*]]
; CHECK-NEXT: ret i8 [[NOT]]
;
%shr = ashr i8 -42, %x
@ -108,7 +109,7 @@ define i8 @not_ashr_const(i8 %x) {
define <2 x i8> @not_ashr_const_splat(<2 x i8> %x) {
; CHECK-LABEL: @not_ashr_const_splat(
; CHECK-NEXT: [[NOT:%.*]] = lshr <2 x i8> <i8 41, i8 41>, %x
; CHECK-NEXT: [[NOT:%.*]] = lshr <2 x i8> <i8 41, i8 41>, [[X:%.*]]
; CHECK-NEXT: ret <2 x i8> [[NOT]]
;
%shr = ashr <2 x i8> <i8 -42, i8 -42>, %x
@ -120,7 +121,7 @@ define <2 x i8> @not_ashr_const_splat(<2 x i8> %x) {
define i8 @not_lshr_const_negative(i8 %x) {
; CHECK-LABEL: @not_lshr_const_negative(
; CHECK-NEXT: [[SHR:%.*]] = lshr i8 -42, %x
; CHECK-NEXT: [[SHR:%.*]] = lshr i8 -42, [[X:%.*]]
; CHECK-NEXT: [[NOT:%.*]] = xor i8 [[SHR]], -1
; CHECK-NEXT: ret i8 [[NOT]]
;
@ -131,7 +132,7 @@ define i8 @not_lshr_const_negative(i8 %x) {
define i8 @not_lshr_const(i8 %x) {
; CHECK-LABEL: @not_lshr_const(
; CHECK-NEXT: [[NOT:%.*]] = ashr i8 -43, %x
; CHECK-NEXT: [[NOT:%.*]] = ashr i8 -43, [[X:%.*]]
; CHECK-NEXT: ret i8 [[NOT]]
;
%shr = lshr i8 42, %x
@ -141,7 +142,7 @@ define i8 @not_lshr_const(i8 %x) {
define <2 x i8> @not_lshr_const_splat(<2 x i8> %x) {
; CHECK-LABEL: @not_lshr_const_splat(
; CHECK-NEXT: [[NOT:%.*]] = ashr <2 x i8> <i8 -43, i8 -43>, %x
; CHECK-NEXT: [[NOT:%.*]] = ashr <2 x i8> <i8 -43, i8 -43>, [[X:%.*]]
; CHECK-NEXT: ret <2 x i8> [[NOT]]
;
%shr = lshr <2 x i8> <i8 42, i8 42>, %x
@ -149,3 +150,72 @@ define <2 x i8> @not_lshr_const_splat(<2 x i8> %x) {
ret <2 x i8> %not
}
define i32 @not_sub(i32 %y) {
; CHECK-LABEL: @not_sub(
; CHECK-NEXT: [[R:%.*]] = add i32 [[Y:%.*]], -124
; CHECK-NEXT: ret i32 [[R]]
;
%s = sub i32 123, %y
%r = xor i32 %s, -1
ret i32 %r
}
define i32 @not_sub_extra_use(i32 %y, i32* %p) {
; CHECK-LABEL: @not_sub_extra_use(
; CHECK-NEXT: [[S:%.*]] = sub i32 123, [[Y:%.*]]
; CHECK-NEXT: store i32 [[S]], i32* [[P:%.*]], align 4
; CHECK-NEXT: [[R:%.*]] = add i32 [[Y]], -124
; CHECK-NEXT: ret i32 [[R]]
;
%s = sub i32 123, %y
store i32 %s, i32* %p
%r = xor i32 %s, -1
ret i32 %r
}
define <2 x i32> @not_sub_splat(<2 x i32> %y) {
; CHECK-LABEL: @not_sub_splat(
; CHECK-NEXT: [[R:%.*]] = add <2 x i32> [[Y:%.*]], <i32 -124, i32 -124>
; CHECK-NEXT: ret <2 x i32> [[R]]
;
%s = sub <2 x i32> <i32 123, i32 123>, %y
%r = xor <2 x i32> %s, <i32 -1, i32 -1>
ret <2 x i32> %r
}
define <2 x i32> @not_sub_extra_use_splat(<2 x i32> %y, <2 x i32>* %p) {
; CHECK-LABEL: @not_sub_extra_use_splat(
; CHECK-NEXT: [[S:%.*]] = sub <2 x i32> <i32 123, i32 123>, [[Y:%.*]]
; CHECK-NEXT: store <2 x i32> [[S]], <2 x i32>* [[P:%.*]], align 8
; CHECK-NEXT: [[R:%.*]] = add <2 x i32> [[Y]], <i32 -124, i32 -124>
; CHECK-NEXT: ret <2 x i32> [[R]]
;
%s = sub <2 x i32> <i32 123, i32 123>, %y
store <2 x i32> %s, <2 x i32>* %p
%r = xor <2 x i32> %s, <i32 -1, i32 -1>
ret <2 x i32> %r
}
define <2 x i32> @not_sub_vec(<2 x i32> %y) {
; CHECK-LABEL: @not_sub_vec(
; CHECK-NEXT: [[R:%.*]] = add <2 x i32> [[Y:%.*]], <i32 -43, i32 -124>
; CHECK-NEXT: ret <2 x i32> [[R]]
;
%s = sub <2 x i32> <i32 42, i32 123>, %y
%r = xor <2 x i32> %s, <i32 -1, i32 -1>
ret <2 x i32> %r
}
define <2 x i32> @not_sub_extra_use_vec(<2 x i32> %y, <2 x i32>* %p) {
; CHECK-LABEL: @not_sub_extra_use_vec(
; CHECK-NEXT: [[S:%.*]] = sub <2 x i32> <i32 123, i32 42>, [[Y:%.*]]
; CHECK-NEXT: store <2 x i32> [[S]], <2 x i32>* [[P:%.*]], align 8
; CHECK-NEXT: [[R:%.*]] = xor <2 x i32> [[S]], <i32 -1, i32 -1>
; CHECK-NEXT: ret <2 x i32> [[R]]
;
%s = sub <2 x i32> <i32 123, i32 42>, %y
store <2 x i32> %s, <2 x i32>* %p
%r = xor <2 x i32> %s, <i32 -1, i32 -1>
ret <2 x i32> %r
}

View File

@ -197,26 +197,6 @@ define <2 x i32> @test16vec(<2 x i32> %A) {
ret <2 x i32> %C
}
define i32 @test17(i32 %A) {
; CHECK-LABEL: @test17(
; CHECK-NEXT: [[C:%.*]] = add i32 %A, -124
; CHECK-NEXT: ret i32 [[C]]
;
%B = sub i32 123, %A
%C = xor i32 %B, -1
ret i32 %C
}
define <2 x i32> @test17vec(<2 x i32> %A) {
; CHECK-LABEL: @test17vec(
; CHECK-NEXT: [[C:%.*]] = add <2 x i32> [[A:%.*]], <i32 -124, i32 -124>
; CHECK-NEXT: ret <2 x i32> [[C]]
;
%B = sub <2 x i32> <i32 123, i32 123>, %A
%C = xor <2 x i32> %B, <i32 -1, i32 -1>
ret <2 x i32> %C
}
define i32 @test18(i32 %A) {
; CHECK-LABEL: @test18(
; CHECK-NEXT: [[C:%.*]] = add i32 %A, 124