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[ARM] Add PostRAScheduler option 

This patch adds the option to allow also using the PostRA scheduler,
which brings the ARM backend inline with AArch64 targets. The
SchedModel can also set 'PostRAScheduler', as the R52 does, so also
query this property in the overridden function.

Differential Revision: https://reviews.llvm.org/D36866

llvm-svn: 311162
This commit is contained in:
Sam Parker 2017-08-18 14:27:51 +00:00
parent ec02acfb98
commit 04a7db5915
3 changed files with 20 additions and 4 deletions
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15
llvm/lib/Target/ARM/ARM.td
View File

@ -323,6 +323,9 @@ def FeatureNoNegativeImmediates
def FeatureUseMISched: SubtargetFeature<"use-misched", "UseMISched", "true",
"Use the MachineScheduler">;
def FeaturePostRAScheduler : SubtargetFeature<"use-postra-scheduler",
"UsePostRAScheduler", "true", "Schedule again after register allocation">;
//===----------------------------------------------------------------------===//
// ARM architecture class
//
@ -869,7 +872,8 @@ def : ProcessorModel<"cortex-r8", CortexA8Model, [ARMv7r,
def : ProcessorModel<"cortex-m3", CortexM3Model, [ARMv7m,
ProcM3,
FeatureHasNoBranchPredictor]>;
FeatureHasNoBranchPredictor,
FeaturePostRAScheduler]>;
def : ProcessorModel<"sc300", CortexM3Model, [ARMv7m,
ProcM3,
@ -879,11 +883,13 @@ def : ProcessorModel<"cortex-m4", CortexM3Model, [ARMv7em,
FeatureVFP4,
FeatureVFPOnlySP,
FeatureD16,
FeatureHasNoBranchPredictor]>;
FeatureHasNoBranchPredictor,
FeaturePostRAScheduler]>;
def : ProcNoItin<"cortex-m7", [ARMv7em,
FeatureFPARMv8,
FeatureD16]>;
FeatureD16,
FeaturePostRAScheduler]>;
def : ProcNoItin<"cortex-m23", [ARMv8mBaseline,
FeatureNoMovt]>;
@ -893,7 +899,8 @@ def : ProcessorModel<"cortex-m33", CortexM3Model, [ARMv8mMainline,
FeatureFPARMv8,
FeatureD16,
FeatureVFPOnlySP,
FeatureHasNoBranchPredictor]>;
FeatureHasNoBranchPredictor,
FeaturePostRAScheduler]>;
def : ProcNoItin<"cortex-a32", [ARMv8a,
FeatureHWDivThumb,

4
llvm/lib/Target/ARM/ARMSubtarget.cpp
View File

@ -357,6 +357,10 @@ bool ARMSubtarget::enableMachineScheduler() const {
// This overrides the PostRAScheduler bit in the SchedModel for any CPU.
bool ARMSubtarget::enablePostRAScheduler() const {
if (usePostRAScheduler())
return true;
if (SchedModel.PostRAScheduler)
return true;
// No need for PostRA scheduling on subtargets where we use the
// MachineScheduler.
if (useMachineScheduler())

5
llvm/lib/Target/ARM/ARMSubtarget.h
View File

@ -191,6 +191,10 @@ protected:
/// UseMISched - True if MachineScheduler should be used for this subtarget.
bool UseMISched = false;
/// UsePostRAScheduler - True if scheduling should happen again after
/// register allocation.
bool UsePostRAScheduler = false;
/// HasThumb2 - True if Thumb2 instructions are supported.
bool HasThumb2 = false;
@ -660,6 +664,7 @@ public:
bool isRWPI() const;
bool useMachineScheduler() const { return UseMISched; }
bool usePostRAScheduler() const { return UsePostRAScheduler; }
bool useSoftFloat() const { return UseSoftFloat; }
bool isThumb() const { return InThumbMode; }
bool isThumb1Only() const { return InThumbMode && !HasThumb2; }