The code emitter generator only supports targets with 32-bit instruction

words.  There is no way for one of these targets to have a > 32-bit immediate!

llvm-svn: 22897

llvm/utils/TableGen/CodeEmitterGen.cpp

@@ -197,7 +197,7 @@ void CodeEmitterGen::run(std::ostream &o) {
         // this is not an operand!!
         if (beginBitInInst != -1) {
           o << "      // op" << op << ": " << Vals[i].getName() << "\n"
-            << "      int64_t op" << op
+            << "      int op" << op
             <<" = getMachineOpValue(MI, MI.getOperand("<<op<<"));\n";
           //<< "   MachineOperand &op" << op <<" = MI.getOperand("<<op<<");\n";
           OpOrder[Vals[i].getName()] = op++;