forked from OSchip/llvm-project
parent
d62719c3fa
commit
0441c6cba0
|
@ -1599,10 +1599,6 @@ void ARMCodeEmitter::emitMiscInstruction(const MachineInstr &MI) {
|
|||
default:
|
||||
llvm_unreachable("ARMCodeEmitter::emitMiscInstruction");
|
||||
|
||||
case ARM::FMSTAT:
|
||||
// No further encoding needed.
|
||||
break;
|
||||
|
||||
case ARM::FCONSTD:
|
||||
case ARM::FCONSTS: {
|
||||
// Encode Dd / Sd.
|
||||
|
|
|
@ -927,7 +927,9 @@ def FMSTAT : VFPAI<(outs), (ins), VFPMiscFrm, IIC_fpSTAT, "vmrs",
|
|||
let Inst{15-12} = 0b1111;
|
||||
let Inst{11-8} = 0b1010;
|
||||
let Inst{7} = 0;
|
||||
let Inst{6-5} = 0b00;
|
||||
let Inst{4} = 1;
|
||||
let Inst{3-0} = 0b0000;
|
||||
}
|
||||
|
||||
// FPSCR <-> GPR (for disassembly only)
|
||||
|
|
|
@ -331,6 +331,8 @@ entry:
|
|||
ret float %sub
|
||||
}
|
||||
|
||||
; FIXME: Check for fmstat instruction.
|
||||
|
||||
define i32 @f100() nounwind readnone {
|
||||
entry:
|
||||
; CHECK: f100
|
||||
|
|
Loading…
Reference in New Issue