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Fix two more instances of mis-matched operand names breaking disassembly. Found by randomized testing. 

llvm-svn: 138337
This commit is contained in:
Owen Anderson 2011-08-23 17:37:32 +00:00
parent dcea63236e
commit 041dba6dec
2 changed files with 12 additions and 6 deletions
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12
llvm/lib/Target/ARM/ARMInstrThumb2.td
View File

@ -809,9 +809,9 @@ multiclass T2I_cmp_irs<bits<4> opcod, string opc,
}
// register
def rr : T2TwoRegCmp<
(outs), (ins GPR:$lhs, rGPR:$rhs), iir,
opc, ".w\t$lhs, $rhs",
[(opnode GPR:$lhs, rGPR:$rhs)]> {
(outs), (ins GPR:$Rn, rGPR:$Rm), iir,
opc, ".w\t$Rn, $Rm",
[(opnode GPR:$Rn, rGPR:$Rm)]> {
let Inst{31-27} = 0b11101;
let Inst{26-25} = 0b01;
let Inst{24-21} = opcod;
@ -1001,9 +1001,9 @@ class T2I_ext_rrot<bits<3> opcod, string opc, PatFrag opnode>
// UXTB16 - Requres T2ExtractPack, does not need the .w qualifier.
class T2I_ext_rrot_uxtb16<bits<3> opcod, string opc, PatFrag opnode>
: T2TwoReg<(outs rGPR:$dst), (ins rGPR:$Rm, rot_imm:$rot),
IIC_iEXTr, opc, "\t$dst, $Rm$rot",
[(set rGPR:$dst, (opnode (rotr rGPR:$Rm, rot_imm:$rot)))]>,
: T2TwoReg<(outs rGPR:$Rd), (ins rGPR:$Rm, rot_imm:$rot),
IIC_iEXTr, opc, "\t$Rd, $Rm$rot",
[(set rGPR:$Rd, (opnode (rotr rGPR:$Rm, rot_imm:$rot)))]>,
Requires<[HasT2ExtractPack, IsThumb2]> {
bits<2> rot;
let Inst{31-27} = 0b11111;

6
llvm/test/MC/Disassembler/ARM/thumb-tests.txt
View File

@ -286,3 +286,9 @@
# CHECK: smlad r5, r12, r8, r11
0x2c 0xfb 0x8 0xb5
# CHECK: teq.w r0, r11
0x90 0xea 0xb 0x8f
# CHECK: uxtb16 r9, r12, ror #16
0x3f 0xfa 0xec 0xf9