forked from OSchip/llvm-project
Fix two more instances of mis-matched operand names breaking disassembly. Found by randomized testing.
llvm-svn: 138337
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@ -809,9 +809,9 @@ multiclass T2I_cmp_irs<bits<4> opcod, string opc,
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}
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}
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// register
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// register
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def rr : T2TwoRegCmp<
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def rr : T2TwoRegCmp<
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(outs), (ins GPR:$lhs, rGPR:$rhs), iir,
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(outs), (ins GPR:$Rn, rGPR:$Rm), iir,
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opc, ".w\t$lhs, $rhs",
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opc, ".w\t$Rn, $Rm",
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[(opnode GPR:$lhs, rGPR:$rhs)]> {
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[(opnode GPR:$Rn, rGPR:$Rm)]> {
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let Inst{31-27} = 0b11101;
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let Inst{31-27} = 0b11101;
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let Inst{26-25} = 0b01;
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let Inst{26-25} = 0b01;
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let Inst{24-21} = opcod;
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let Inst{24-21} = opcod;
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@ -1001,9 +1001,9 @@ class T2I_ext_rrot<bits<3> opcod, string opc, PatFrag opnode>
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// UXTB16 - Requres T2ExtractPack, does not need the .w qualifier.
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// UXTB16 - Requres T2ExtractPack, does not need the .w qualifier.
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class T2I_ext_rrot_uxtb16<bits<3> opcod, string opc, PatFrag opnode>
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class T2I_ext_rrot_uxtb16<bits<3> opcod, string opc, PatFrag opnode>
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: T2TwoReg<(outs rGPR:$dst), (ins rGPR:$Rm, rot_imm:$rot),
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: T2TwoReg<(outs rGPR:$Rd), (ins rGPR:$Rm, rot_imm:$rot),
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IIC_iEXTr, opc, "\t$dst, $Rm$rot",
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IIC_iEXTr, opc, "\t$Rd, $Rm$rot",
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[(set rGPR:$dst, (opnode (rotr rGPR:$Rm, rot_imm:$rot)))]>,
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[(set rGPR:$Rd, (opnode (rotr rGPR:$Rm, rot_imm:$rot)))]>,
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Requires<[HasT2ExtractPack, IsThumb2]> {
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Requires<[HasT2ExtractPack, IsThumb2]> {
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bits<2> rot;
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bits<2> rot;
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let Inst{31-27} = 0b11111;
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let Inst{31-27} = 0b11111;
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@ -286,3 +286,9 @@
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# CHECK: smlad r5, r12, r8, r11
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# CHECK: smlad r5, r12, r8, r11
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0x2c 0xfb 0x8 0xb5
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0x2c 0xfb 0x8 0xb5
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# CHECK: teq.w r0, r11
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0x90 0xea 0xb 0x8f
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# CHECK: uxtb16 r9, r12, ror #16
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0x3f 0xfa 0xec 0xf9
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