forked from OSchip/llvm-project
Fix incorrect operand sizes for some MMX instructions: punpcklwd, punpcklbw and punpckldq.
Differential Revision: https://reviews.llvm.org/D41595 llvm-svn: 321549
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02e7f0247b
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@ -94,7 +94,8 @@ let Constraints = "$src1 = $dst" in {
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// MMXI_binop_rm_int - Simple MMX binary operator based on intrinsic.
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// MMXI_binop_rm_int - Simple MMX binary operator based on intrinsic.
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// When this is cleaned up, remove the FIXME from X86RecognizableInstr.cpp.
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// When this is cleaned up, remove the FIXME from X86RecognizableInstr.cpp.
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multiclass MMXI_binop_rm_int<bits<8> opc, string OpcodeStr, Intrinsic IntId,
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multiclass MMXI_binop_rm_int<bits<8> opc, string OpcodeStr, Intrinsic IntId,
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OpndItins itins, bit Commutable = 0> {
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OpndItins itins, bit Commutable = 0,
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X86MemOperand OType = i64mem> {
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def irr : MMXI<opc, MRMSrcReg, (outs VR64:$dst),
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def irr : MMXI<opc, MRMSrcReg, (outs VR64:$dst),
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(ins VR64:$src1, VR64:$src2),
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(ins VR64:$src1, VR64:$src2),
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!strconcat(OpcodeStr, "\t{$src2, $dst|$dst, $src2}"),
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!strconcat(OpcodeStr, "\t{$src2, $dst|$dst, $src2}"),
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@ -103,7 +104,7 @@ let Constraints = "$src1 = $dst" in {
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let isCommutable = Commutable;
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let isCommutable = Commutable;
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}
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}
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def irm : MMXI<opc, MRMSrcMem, (outs VR64:$dst),
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def irm : MMXI<opc, MRMSrcMem, (outs VR64:$dst),
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(ins VR64:$src1, i64mem:$src2),
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(ins VR64:$src1, OType:$src2),
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!strconcat(OpcodeStr, "\t{$src2, $dst|$dst, $src2}"),
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!strconcat(OpcodeStr, "\t{$src2, $dst|$dst, $src2}"),
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[(set VR64:$dst, (IntId VR64:$src1,
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[(set VR64:$dst, (IntId VR64:$src1,
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(bitconvert (load_mmx addr:$src2))))],
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(bitconvert (load_mmx addr:$src2))))],
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@ -524,13 +525,16 @@ defm MMX_PUNPCKHDQ : MMXI_binop_rm_int<0x6A, "punpckhdq",
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MMX_UNPCK_H_ITINS>;
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MMX_UNPCK_H_ITINS>;
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defm MMX_PUNPCKLBW : MMXI_binop_rm_int<0x60, "punpcklbw",
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defm MMX_PUNPCKLBW : MMXI_binop_rm_int<0x60, "punpcklbw",
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int_x86_mmx_punpcklbw,
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int_x86_mmx_punpcklbw,
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MMX_UNPCK_L_ITINS>;
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MMX_UNPCK_L_ITINS,
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0, i32mem>;
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defm MMX_PUNPCKLWD : MMXI_binop_rm_int<0x61, "punpcklwd",
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defm MMX_PUNPCKLWD : MMXI_binop_rm_int<0x61, "punpcklwd",
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int_x86_mmx_punpcklwd,
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int_x86_mmx_punpcklwd,
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MMX_UNPCK_L_ITINS>;
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MMX_UNPCK_L_ITINS,
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0, i32mem>;
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defm MMX_PUNPCKLDQ : MMXI_binop_rm_int<0x62, "punpckldq",
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defm MMX_PUNPCKLDQ : MMXI_binop_rm_int<0x62, "punpckldq",
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int_x86_mmx_punpckldq,
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int_x86_mmx_punpckldq,
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MMX_UNPCK_L_ITINS>;
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MMX_UNPCK_L_ITINS,
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0, i32mem>;
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// -- Pack Instructions
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// -- Pack Instructions
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defm MMX_PACKSSWB : MMXI_binop_rm_int<0x63, "packsswb", int_x86_mmx_packsswb,
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defm MMX_PACKSSWB : MMXI_binop_rm_int<0x63, "packsswb", int_x86_mmx_packsswb,
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@ -34,3 +34,13 @@ lea RDX, [4 * RAX + 27 * RBX + _pat]
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lea RDX, [[arr]
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lea RDX, [[arr]
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//CHECK: error: unexpected bracket encountered
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//CHECK: error: unexpected bracket encountered
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lea RDX, [arr[]
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lea RDX, [arr[]
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.intel_syntax
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// CHECK: error: invalid operand for instruction
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punpcklbw mm0, qword ptr [rsp]
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// CHECK: error: invalid operand for instruction
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punpcklwd mm0, word ptr [rsp]
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// CHECK: error: invalid operand for instruction
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punpckldq mm0, qword ptr [rsp]
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@ -867,3 +867,11 @@ movsd qword ptr [rax], xmm0
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xlat byte ptr [eax]
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xlat byte ptr [eax]
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// CHECK: xlatb
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// CHECK: xlatb
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// CHECK-STDERR: memory operand is only for determining the size, (R|E)BX will be used for the location
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// CHECK-STDERR: memory operand is only for determining the size, (R|E)BX will be used for the location
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// CHECK: punpcklbw
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punpcklbw mm0, dword ptr [rsp]
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// CHECK: punpcklwd
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punpcklwd mm0, dword ptr [rsp]
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// CHECK: punpckldq
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punpckldq mm0, dword ptr [rsp]
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@ -39,7 +39,7 @@
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// CHECK: Matching formal operand class MCK_VR64 against actual operand at index 2 (): Opcode result: multiple operand mismatches, ignoring this opcode
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// CHECK: Matching formal operand class MCK_VR64 against actual operand at index 2 (): Opcode result: multiple operand mismatches, ignoring this opcode
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// CHECK:Trying to match opcode MMX_PUNPCKLBWirm
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// CHECK:Trying to match opcode MMX_PUNPCKLBWirm
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// CHECK: Matching formal operand class MCK_VR64 against actual operand at index 1 (): match success using generic matcher
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// CHECK: Matching formal operand class MCK_VR64 against actual operand at index 1 (): match success using generic matcher
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// CHECK: Matching formal operand class MCK_Mem64 against actual operand at index 2 (): match success using generic matcher
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// CHECK: Matching formal operand class MCK_Mem32 against actual operand at index 2 (): match success using generic matcher
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// CHECK: Matching formal operand class InvalidMatchClass against actual operand at index 3: actual operand index out of range Opcode result: complete match, selecting this opcode
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// CHECK: Matching formal operand class InvalidMatchClass against actual operand at index 3: actual operand index out of range Opcode result: complete match, selecting this opcode
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@ -49,4 +49,4 @@ pinsrw $3, %ecx, %xmm5
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crc32l %gs:0xdeadbeef(%rbx,%rcx,8),%ecx
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crc32l %gs:0xdeadbeef(%rbx,%rcx,8),%ecx
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.intel_syntax
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.intel_syntax
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punpcklbw mm0, qword ptr [rsp]
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punpcklbw mm0, dword ptr [rsp]
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