forked from OSchip/llvm-project
[RISCV] Remove unused VM register class
Nothing references this class today so it looks like some leftover. Differential Revision: https://reviews.llvm.org/D91977
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@ -331,13 +331,6 @@ def VRM8 : RegisterClass<"RISCV", [nxv32i16, nxv16i32, nxv8i64], 64,
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def VMaskVT : RegisterTypes<[nxv1i1, nxv2i1, nxv4i1, nxv8i1, nxv16i1, nxv32i1]>;
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def VM : RegisterClass<"RISCV", VMaskVT.types, 64, (add
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(sequence "V%u", 25, 31),
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(sequence "V%u", 8, 24),
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(sequence "V%u", 0, 7))> {
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let Size = 64;
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}
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def VMV0 : RegisterClass<"RISCV", VMaskVT.types, 64, (add V0)> {
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let Size = 64;
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}
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