forked from OSchip/llvm-project
[globalisel] Add comments indicating the operand order
llvm-svn: 345769
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@ -649,6 +649,9 @@ def G_EXTRACT : GenericInstruction {
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// Extract multiple registers specified size, starting from blocks given by
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// indexes. This will almost certainly be mapped to sub-register COPYs after
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// register banks have been selected.
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// The output operands are always ordered from lowest bits to highest:
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// %bits_0_7:(s8), %bits_8_15:(s8),
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// %bits_16_23:(s8), %bits_24_31:(s8) = G_UNMERGE_VALUES %0:(s32)
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def G_UNMERGE_VALUES : GenericInstruction {
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let OutOperandList = (outs type0:$dst0, variable_ops);
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let InOperandList = (ins type1:$src);
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@ -662,7 +665,10 @@ def G_INSERT : GenericInstruction {
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let hasSideEffects = 0;
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}
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/// Concatenate multiple registers of the same size into a wider register.
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// Concatenate multiple registers of the same size into a wider register.
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// The input operands are always ordered from lowest bits to highest:
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// %0:(s32) = G_MERGE_VALUES %bits_0_7:(s8), %bits_8_15:(s8),
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// %bits_16_23:(s8), %bits_24_31:(s8)
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def G_MERGE_VALUES : GenericInstruction {
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let OutOperandList = (outs type0:$dst);
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let InOperandList = (ins type1:$src0, variable_ops);
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