forked from OSchip/llvm-project
Revert "[CodeGen] Async unwind - add a pass to fix CFI information"
This reverts commit 980c3e6dd2.
This commit had failing tests with clang crashing across various
AArch64/Linux buildots.
https://lab.llvm.org/buildbot/#/builders/179/builds/3346
Differential Revision: https://reviews.llvm.org/D114545
This commit is contained in:
Muhammad Omair Javaid
parent
64f659bee6
commit
0320115c16
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@ -1,38 +0,0 @@
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//===-- CFIFixup.h - Insert CFI remember/restore instructions ---*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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///
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/// \file
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/// Contains definition of the base CFIFixup pass.
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///
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_CODEGEN_CFIFIXUP_H
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#define LLVM_CODEGEN_CFIFIXUP_H
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#include "llvm/CodeGen/MachineFunctionPass.h"
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#include "llvm/InitializePasses.h"
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namespace llvm {
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class CFIFixup : public MachineFunctionPass {
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public:
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static char ID;
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CFIFixup() : MachineFunctionPass(ID) {
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initializeCFIFixupPass(*PassRegistry::getPassRegistry());
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}
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void getAnalysisUsage(AnalysisUsage &AU) const override {
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AU.setPreservesAll();
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MachineFunctionPass::getAnalysisUsage(AU);
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}
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bool runOnMachineFunction(MachineFunction &MF) override;
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};
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} // namespace llvm
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#endif // LLVM_CODEGEN_CFIFIXUP_H
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@ -494,9 +494,6 @@ namespace llvm {
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// This pass expands indirectbr instructions.
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FunctionPass *createIndirectBrExpandPass();
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/// Creates CFI Fixup pass. \see CFIFixup.cpp
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FunctionPass *createCFIFixup();
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/// Creates CFI Instruction Inserter pass. \see CFIInstrInserter.cpp
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FunctionPass *createCFIInstrInserter();
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@ -223,14 +223,6 @@ public:
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emitCalleeSavedFrameMovesFullCFA(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator MBBI) const {}
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/// Returns true if we may need to fix the unwind infportmation for the
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/// function.
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virtual bool enableCFIFixup(MachineFunction &MF) const;
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/// Emit CFI instructions that recreate the state of the unwind information
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/// upon fucntion entry.
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virtual void resetCFIToInitialState(MachineBasicBlock &MBB) const {}
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/// Replace a StackProbe stub (if any) with the actual probe code inline
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virtual void inlineStackProbe(MachineFunction &MF,
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MachineBasicBlock &PrologueMBB) const {}
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@ -103,7 +103,6 @@ void initializeCFGSimplifyPassPass(PassRegistry&);
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void initializeCFGuardPass(PassRegistry&);
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void initializeCFGuardLongjmpPass(PassRegistry&);
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void initializeCFGViewerLegacyPassPass(PassRegistry&);
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void initializeCFIFixupPass(PassRegistry&);
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void initializeCFIInstrInserterPass(PassRegistry&);
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void initializeCFLAndersAAWrapperPassPass(PassRegistry&);
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void initializeCFLSteensAAWrapperPassPass(PassRegistry&);
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@ -257,8 +257,6 @@ public:
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Options.SupportsDebugEntryValues = Enable;
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}
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void setCFIFixup(bool Enable) { Options.EnableCFIFixup = Enable; }
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bool getAIXExtendedAltivecABI() const {
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return Options.EnableAIXExtendedAltivecABI;
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}
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@ -144,7 +144,6 @@ namespace llvm {
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ValueTrackingVariableLocations(false), ForceDwarfFrameSection(false),
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XRayOmitFunctionIndex(false), DebugStrictDwarf(false),
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Hotpatch(false), PPCGenScalarMASSEntries(false), JMCInstrument(false),
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EnableCFIFixup(false),
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FPDenormalMode(DenormalMode::IEEE, DenormalMode::IEEE) {}
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/// DisableFramePointerElim - This returns true if frame pointer elimination
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@ -357,9 +356,6 @@ namespace llvm {
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/// Enable JustMyCode instrumentation.
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unsigned JMCInstrument : 1;
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/// Enable the CFIFixup pass.
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unsigned EnableCFIFixup : 1;
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/// Name of the stack usage file (i.e., .su file) if user passes
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/// -fstack-usage. If empty, it can be implied that -fstack-usage is not
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/// passed on the command line.
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@ -273,12 +273,6 @@ void AsmPrinter::emitCFIInstruction(const MCCFIInstruction &Inst) const {
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case MCCFIInstruction::OpUndefined:
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OutStreamer->emitCFIUndefined(Inst.getRegister());
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break;
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case MCCFIInstruction::OpRememberState:
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OutStreamer->emitCFIRememberState();
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break;
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case MCCFIInstruction::OpRestoreState:
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OutStreamer->emitCFIRestoreState();
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break;
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}
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}
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@ -1,215 +0,0 @@
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//===------ CFIFixup.cpp - Insert CFI remember/restore instructions -------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This pass inserts the necessary instructions to adjust for the inconsistency
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// of the call-frame information caused by final machine basic block layout.
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// The pass relies in constraints LLVM imposes on the placement of
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// save/restore points (cf. ShrinkWrap):
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// * there is a single basic block, containing the function prologue
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// * possibly multiple epilogue blocks, where each epilogue block is
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// complete and self-contained, i.e. CSR restore instructions (and the
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// corresponding CFI instructions are not split across two or more blocks.
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// * prologue and epilogue blocks are outside of any loops
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// Thus, during execution, at the beginning and at the end of each basic block
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// the function can be in one of two states:
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// - "has a call frame", if the function has executed the prologue, and
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// has not executed any epilogue
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// - "does not have a call frame", if the function has not executed the
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// prologue, or has executed an epilogue
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// which can be computed by a single RPO traversal.
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// In order to accommodate backends which do not generate unwind info in
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// epilogues we compute an additional property "strong no call frame on entry",
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// which is set for the entry point of the function and for every block
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// reachable from the entry along a path that does not execute the prologue. If
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// this property holds, it takes precedence over the "has a call frame"
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// property.
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// From the point of view of the unwind tables, the "has/does not have call
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// frame" state at beginning of each block is determined by the state at the end
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// of the previous block, in layout order. Where these states differ, we insert
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// compensating CFI instructions, which come in two flavours:
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// - CFI instructions, which reset the unwind table state to the initial one.
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// This is done by a target specific hook and is expected to be trivial
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// to implement, for example it could be:
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// .cfi_def_cfa <sp>, 0
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// .cfi_same_value <rN>
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// .cfi_same_value <rN-1>
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// ...
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// where <rN> are the callee-saved registers.
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// - CFI instructions, which reset the unwind table state to the one
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// created by the function prologue. These are
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// .cfi_restore_state
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// .cfi_remember_state
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// In this case we also insert a `.cfi_remember_state` after the last CFI
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// instruction in the function prologue.
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//
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// Known limitations:
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// * the pass cannot handle an epilogue preceding the prologue in the basic
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// block layout
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// * the pass does not handle functions where SP is used as a frame pointer and
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// SP adjustments up and down are done in different basic blocks (TODO)
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//===----------------------------------------------------------------------===//
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#include "llvm/CodeGen/CFIFixup.h"
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#include "llvm/ADT/PostOrderIterator.h"
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#include "llvm/ADT/SmallBitVector.h"
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#include "llvm/CodeGen/Passes.h"
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#include "llvm/CodeGen/TargetFrameLowering.h"
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#include "llvm/CodeGen/TargetInstrInfo.h"
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#include "llvm/CodeGen/TargetSubtargetInfo.h"
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#include "llvm/MC/MCAsmInfo.h"
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#include "llvm/MC/MCDwarf.h"
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#include "llvm/Target/TargetMachine.h"
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using namespace llvm;
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#define DEBUG_TYPE "cfi-fixup"
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char CFIFixup::ID = 0;
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INITIALIZE_PASS(CFIFixup, "cfi-fixup",
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"Insert CFI remember/restore state instructions", false, false)
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FunctionPass *llvm::createCFIFixup() { return new CFIFixup(); }
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static bool isPrologueCFIInstruction(const MachineInstr &MI) {
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return MI.getOpcode() == TargetOpcode::CFI_INSTRUCTION &&
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MI.getFlag(MachineInstr::FrameSetup);
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}
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static bool containsPrologue(const MachineBasicBlock &MBB) {
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return llvm::any_of(MBB.instrs(), isPrologueCFIInstruction);
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}
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static bool containsEpilogue(const MachineBasicBlock &MBB) {
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return llvm::any_of(llvm::reverse(MBB), [](const auto &MI) {
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return MI.getOpcode() == TargetOpcode::CFI_INSTRUCTION &&
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MI.getFlag(MachineInstr::FrameDestroy);
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});
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}
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bool CFIFixup::runOnMachineFunction(MachineFunction &MF) {
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const TargetFrameLowering &TFL = *MF.getSubtarget().getFrameLowering();
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if (!TFL.enableCFIFixup(MF))
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return false;
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const unsigned NumBlocks = MF.getNumBlockIDs();
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if (NumBlocks < 2)
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return false;
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struct BlockFlags {
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bool StrongNoFrameOnEntry : 1;
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bool HasFrameOnEntry : 1;
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bool HasFrameOnExit : 1;
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};
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SmallVector<BlockFlags, 32> BlockInfo(NumBlocks, {false, false, false});
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BlockInfo[0].StrongNoFrameOnEntry = true;
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// Compute the presence/absence of frame at each basic block.
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MachineBasicBlock *PrologueBlock = nullptr;
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ReversePostOrderTraversal<MachineBasicBlock *> RPOT(&*MF.begin());
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for (MachineBasicBlock *MBB : RPOT) {
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BlockFlags &Info = BlockInfo[MBB->getNumber()];
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// Set to true if the current block contains the prologue or the epilogue,
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// respectively.
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bool HasPrologue = false;
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bool HasEpilogue = false;
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if (!PrologueBlock && !Info.HasFrameOnEntry && containsPrologue(*MBB)) {
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PrologueBlock = MBB;
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HasPrologue = true;
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}
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if (Info.HasFrameOnEntry || HasPrologue)
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HasEpilogue = containsEpilogue(*MBB);
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// If the function has a call frame at the entry of the current block or the
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// current block contains the prologue, then the function has a call frame
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// at the exit of the block, unless the block contains the epilogue.
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Info.HasFrameOnExit = (Info.HasFrameOnEntry || HasPrologue) && !HasEpilogue;
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// Set the successors' state on entry.
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for (MachineBasicBlock *Succ : MBB->successors()) {
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BlockFlags &SuccInfo = BlockInfo[Succ->getNumber()];
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SuccInfo.StrongNoFrameOnEntry |=
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Info.StrongNoFrameOnEntry && !HasPrologue;
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SuccInfo.HasFrameOnEntry = Info.HasFrameOnExit;
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}
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}
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if (!PrologueBlock)
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return false;
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// Walk the blocks of the function in "physical" order.
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// Every block inherits the frame state (as recorded in the unwind tables)
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// of the previous block. If the intended frame state is different, insert
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// compensating CFI instructions.
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const TargetInstrInfo &TII = *MF.getSubtarget().getInstrInfo();
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bool Change = false;
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// `InsertPt` always points to the point in a preceding block where we have to
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// insert a `.cfi_remember_state`, in the case that the current block needs a
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// `.cfi_restore_state`.
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MachineBasicBlock *InsertMBB = PrologueBlock;
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MachineBasicBlock::iterator InsertPt = PrologueBlock->begin();
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for (MachineInstr &MI : *PrologueBlock)
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if (isPrologueCFIInstruction(MI))
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InsertPt = std::next(MI.getIterator());
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assert(InsertPt != PrologueBlock->begin() &&
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"Inconsistent notion of \"prologue block\"");
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// No point starting before the prologue block.
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// TODO: the unwind tables will still be incorrect if an epilogue physically
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// preceeds the prologue.
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MachineFunction::iterator CurrBB = std::next(PrologueBlock->getIterator());
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bool HasFrame = BlockInfo[PrologueBlock->getNumber()].HasFrameOnExit;
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while (CurrBB != MF.end()) {
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auto &Info = BlockInfo[CurrBB->getNumber()];
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#ifndef NDEBUG
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if (!Info.StrongNoFrameOnEntry) {
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for (auto *Pred : CurrBB->predecessors())
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assert(Info.HasFrameOnEntry ==
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BlockInfo[Pred->getNumber()].HasFrameOnExit &&
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"Inconsistent call frame state");
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}
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#endif
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if (!Info.StrongNoFrameOnEntry && Info.HasFrameOnEntry && !HasFrame) {
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// Reset to the "after prologue" state.
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// Insert a `.cfi_remember_state` into the last block known to have a
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// stack frame.
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unsigned CFIIndex =
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MF.addFrameInst(MCCFIInstruction::createRememberState(nullptr));
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BuildMI(*InsertMBB, InsertPt, DebugLoc(),
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TII.get(TargetOpcode::CFI_INSTRUCTION))
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.addCFIIndex(CFIIndex);
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// Insert a `.cfi_restore_state` at the beginning of the current block.
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CFIIndex = MF.addFrameInst(MCCFIInstruction::createRestoreState(nullptr));
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InsertPt = BuildMI(*CurrBB, CurrBB->begin(), DebugLoc(),
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TII.get(TargetOpcode::CFI_INSTRUCTION))
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.addCFIIndex(CFIIndex);
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++InsertPt;
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InsertMBB = &*CurrBB;
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Change = true;
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} else if ((Info.StrongNoFrameOnEntry || !Info.HasFrameOnEntry) &&
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HasFrame) {
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// Reset to the state upon function entry.
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TFL.resetCFIToInitialState(*CurrBB);
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Change = true;
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}
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HasFrame = Info.HasFrameOnExit;
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++CurrBB;
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}
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return Change;
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}
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@ -38,7 +38,6 @@ add_llvm_component_library(LLVMCodeGen
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CalcSpillWeights.cpp
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CallingConvLower.cpp
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CFGuardLongjmp.cpp
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CFIFixup.cpp
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CFIInstrInserter.cpp
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CodeGen.cpp
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CodeGenCommonISel.cpp
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@ -24,7 +24,6 @@ void llvm::initializeCodeGen(PassRegistry &Registry) {
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initializeBranchFolderPassPass(Registry);
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initializeBranchRelaxationPass(Registry);
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initializeCFGuardLongjmpPass(Registry);
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initializeCFIFixupPass(Registry);
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initializeCFIInstrInserterPass(Registry);
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initializeCheckDebugMachineModulePass(Registry);
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initializeCodeGenPreparePass(Registry);
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@ -383,9 +383,8 @@ void TailDuplicator::duplicateInstruction(
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// Allow duplication of CFI instructions.
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if (MI->isCFIInstruction()) {
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BuildMI(*PredBB, PredBB->end(), PredBB->findDebugLoc(PredBB->begin()),
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TII->get(TargetOpcode::CFI_INSTRUCTION))
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.addCFIIndex(MI->getOperand(0).getCFIIndex())
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.setMIFlags(MI->getFlags());
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TII->get(TargetOpcode::CFI_INSTRUCTION)).addCFIIndex(
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MI->getOperand(0).getCFIIndex());
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return;
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}
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MachineInstr &NewMI = TII->duplicate(*PredBB, PredBB->end(), *MI);
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@ -21,8 +21,6 @@
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#include "llvm/IR/CallingConv.h"
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#include "llvm/IR/Function.h"
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#include "llvm/IR/InstrTypes.h"
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#include "llvm/MC/MCAsmInfo.h"
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#include "llvm/MC/MCRegisterInfo.h"
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#include "llvm/Support/Compiler.h"
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#include "llvm/Target/TargetMachine.h"
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#include "llvm/Target/TargetOptions.h"
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@ -38,11 +36,6 @@ bool TargetFrameLowering::enableCalleeSaveSkip(const MachineFunction &MF) const
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return false;
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}
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bool TargetFrameLowering::enableCFIFixup(MachineFunction &MF) const {
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return MF.needsFrameMoves() &&
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!MF.getTarget().getMCAsmInfo()->usesWindowsCFI();
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}
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/// Returns the displacement from the frame register to the stack
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/// frame of the specified index, along with the frame register used
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/// (in output arg FrameReg). This is the default implementation which
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@ -138,11 +138,6 @@ static cl::opt<RunOutliner> EnableMachineOutliner(
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"Disable all outlining"),
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// Sentinel value for unspecified option.
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clEnumValN(RunOutliner::AlwaysOutline, "", "")));
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// Disable the pass to fix unwind information. Whether the pass is included in
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// the pipeline is controlled via the target options, this option serves as
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// manual override.
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static cl::opt<bool> DisableCFIFixup("disable-cfi-fixup", cl::Hidden,
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cl::desc("Disable the CFI fixup pass"));
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// Enable or disable FastISel. Both options are needed, because
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// FastISel is enabled by default with -fast, and we wish to be
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// able to enable or disable fast-isel independently from -O0.
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@ -1280,9 +1275,6 @@ void TargetPassConfig::addMachinePasses() {
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addPass(createMachineFunctionSplitterPass());
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}
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if (!DisableCFIFixup && TM->Options.EnableCFIFixup)
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addPass(createCFIFixup());
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// Add passes that directly emit MI after all other MI passes.
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addPreEmitPass2();
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@ -73,7 +73,6 @@ void initializeAArch64A53Fix835769Pass(PassRegistry&);
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void initializeAArch64A57FPLoadBalancingPass(PassRegistry&);
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void initializeAArch64AdvSIMDScalarPass(PassRegistry&);
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void initializeAArch64BranchTargetsPass(PassRegistry&);
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void initializeAArch64CFIFixupPass(PassRegistry&);
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void initializeAArch64CollectLOHPass(PassRegistry&);
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void initializeAArch64CondBrTuningPass(PassRegistry &);
|
||||
void initializeAArch64CompressJumpTablesPass(PassRegistry&);
|
||||
|
|
|
|||
|
|
@ -298,7 +298,6 @@ static int64_t getArgumentStackToRestore(MachineFunction &MF,
|
|||
static bool produceCompactUnwindFrame(MachineFunction &MF);
|
||||
static bool needsWinCFI(const MachineFunction &MF);
|
||||
static StackOffset getSVEStackSize(const MachineFunction &MF);
|
||||
static bool needsShadowCallStackPrologueEpilogue(MachineFunction &MF);
|
||||
|
||||
/// Returns true if a homogeneous prolog or epilog code can be emitted
|
||||
/// for the size optimization. If possible, a frame helper call is injected.
|
||||
|
|
@ -581,57 +580,6 @@ void AArch64FrameLowering::emitCalleeSavedFrameMoves(
|
|||
emitCalleeSavedSVELocations(MBB, MBBI);
|
||||
}
|
||||
|
||||
static void insertCFISameValue(const MCInstrDesc &Desc, MachineFunction &MF,
|
||||
MachineBasicBlock &MBB,
|
||||
MachineBasicBlock::iterator InsertPt,
|
||||
unsigned DwarfReg) {
|
||||
unsigned CFIIndex =
|
||||
MF.addFrameInst(MCCFIInstruction::createSameValue(nullptr, DwarfReg));
|
||||
BuildMI(MBB, InsertPt, DebugLoc(), Desc).addCFIIndex(CFIIndex);
|
||||
}
|
||||
|
||||
void AArch64FrameLowering::resetCFIToInitialState(
|
||||
MachineBasicBlock &MBB) const {
|
||||
|
||||
MachineFunction &MF = *MBB.getParent();
|
||||
const auto &Subtarget = MF.getSubtarget<AArch64Subtarget>();
|
||||
const TargetInstrInfo &TII = *Subtarget.getInstrInfo();
|
||||
const auto &TRI =
|
||||
static_cast<const AArch64RegisterInfo &>(*Subtarget.getRegisterInfo());
|
||||
const auto &MFI = *MF.getInfo<AArch64FunctionInfo>();
|
||||
|
||||
const MCInstrDesc &CFIDesc = TII.get(TargetOpcode::CFI_INSTRUCTION);
|
||||
DebugLoc DL;
|
||||
|
||||
// Reset the CFA to `SP + 0`.
|
||||
MachineBasicBlock::iterator InsertPt = MBB.begin();
|
||||
unsigned CFIIndex = MF.addFrameInst(MCCFIInstruction::cfiDefCfa(
|
||||
nullptr, TRI.getDwarfRegNum(AArch64::SP, true), 0));
|
||||
BuildMI(MBB, InsertPt, DL, CFIDesc).addCFIIndex(CFIIndex);
|
||||
|
||||
// Flip the RA sign state.
|
||||
if (MFI.shouldSignReturnAddress()) {
|
||||
CFIIndex = MF.addFrameInst(MCCFIInstruction::createNegateRAState(nullptr));
|
||||
BuildMI(MBB, InsertPt, DL, CFIDesc).addCFIIndex(CFIIndex);
|
||||
}
|
||||
|
||||
// Shadow call stack uses X18, reset it.
|
||||
if (needsShadowCallStackPrologueEpilogue(MF))
|
||||
insertCFISameValue(CFIDesc, MF, MBB, InsertPt,
|
||||
TRI.getDwarfRegNum(AArch64::X18, true));
|
||||
|
||||
// Emit .cfi_same_value for callee-saved registers.
|
||||
const std::vector<CalleeSavedInfo> &CSI =
|
||||
MF.getFrameInfo().getCalleeSavedInfo();
|
||||
for (const auto &Info : CSI) {
|
||||
unsigned Reg = Info.getReg();
|
||||
if (!TRI.regNeedsCFI(Reg, Reg))
|
||||
continue;
|
||||
insertCFISameValue(CFIDesc, MF, MBB, InsertPt,
|
||||
TRI.getDwarfRegNum(Reg, true));
|
||||
}
|
||||
}
|
||||
|
||||
// Find a scratch register that we can use at the start of the prologue to
|
||||
// re-align the stack pointer. We avoid using callee-save registers since they
|
||||
// may appear to be free when this is called from canUseAsPrologue (during
|
||||
|
|
|
|||
|
|
@ -29,8 +29,6 @@ public:
|
|||
void emitCalleeSavedFrameMoves(MachineBasicBlock &MBB,
|
||||
MachineBasicBlock::iterator MBBI) const;
|
||||
|
||||
void resetCFIToInitialState(MachineBasicBlock &MBB) const override;
|
||||
|
||||
MachineBasicBlock::iterator
|
||||
eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
|
||||
MachineBasicBlock::iterator I) const override;
|
||||
|
|
|
|||
|
|
@ -21,7 +21,6 @@
|
|||
#include "llvm/ADT/STLExtras.h"
|
||||
#include "llvm/ADT/Triple.h"
|
||||
#include "llvm/Analysis/TargetTransformInfo.h"
|
||||
#include "llvm/CodeGen/CFIFixup.h"
|
||||
#include "llvm/CodeGen/CSEConfigBase.h"
|
||||
#include "llvm/CodeGen/GlobalISel/CSEInfo.h"
|
||||
#include "llvm/CodeGen/GlobalISel/IRTranslator.h"
|
||||
|
|
@ -356,10 +355,6 @@ AArch64TargetMachine::AArch64TargetMachine(const Target &T, const Triple &TT,
|
|||
|
||||
// AArch64 supports the debug entry values.
|
||||
setSupportsDebugEntryValues(true);
|
||||
|
||||
// AArch64 supports fixing up the DWARF unwind information.
|
||||
if (!getMCAsmInfo()->usesWindowsCFI())
|
||||
setCFIFixup(true);
|
||||
}
|
||||
|
||||
AArch64TargetMachine::~AArch64TargetMachine() = default;
|
||||
|
|
|
|||
|
|
@ -67,7 +67,6 @@
|
|||
; CHECK-NEXT: Contiguously Lay Out Funclets
|
||||
; CHECK-NEXT: StackMap Liveness Analysis
|
||||
; CHECK-NEXT: Live DEBUG_VALUE analysis
|
||||
; CHECK-NEXT: Insert CFI remember/restore state instructions
|
||||
; CHECK-NEXT: Unpack machine instruction bundles
|
||||
; CHECK-NEXT: Lazy Machine Block Frequency Analysis
|
||||
; CHECK-NEXT: Machine Optimization Remark Emitter
|
||||
|
|
|
|||
|
|
@ -208,7 +208,6 @@
|
|||
; CHECK-NEXT: Live DEBUG_VALUE analysis
|
||||
; CHECK-NEXT: Machine Outliner
|
||||
; CHECK-NEXT: FunctionPass Manager
|
||||
; CHECK-NEXT: Insert CFI remember/restore state instructions
|
||||
; CHECK-NEXT: Unpack machine instruction bundles
|
||||
; CHECK-NEXT: Lazy Machine Block Frequency Analysis
|
||||
; CHECK-NEXT: Machine Optimization Remark Emitter
|
||||
|
|
|
|||
|
|
@ -276,7 +276,7 @@ define dso_local i1 @test_setcc3() {
|
|||
}
|
||||
|
||||
|
||||
define dso_local i32 @test_br_cc() uwtable {
|
||||
define dso_local i32 @test_br_cc() {
|
||||
; CHECK-LABEL: test_br_cc:
|
||||
; CHECK: // %bb.0:
|
||||
; CHECK-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
|
||||
|
|
|
|||
|
|
@ -34,10 +34,6 @@
|
|||
; HOTNESS-NEXT: Executing Pass 'Function Pass Manager'
|
||||
; HOTNESS-NEXT: Executing Pass 'Verify generated machine code'
|
||||
; HOTNESS-NEXT: Freeing Pass 'Verify generated machine code'
|
||||
; HOTNESS-NEXT: Executing Pass 'Insert CFI remember/restore state instructions' on Function 'empty_func'
|
||||
; HOTNESS-NEXT: Freeing Pass 'Insert CFI remember/restore state instructions' on Function 'empty_func'
|
||||
; HOTNESS-NEXT: Executing Pass 'Verify generated machine code'
|
||||
; HOTNESS-NEXT: Freeing Pass 'Verify generated machine code'
|
||||
; HOTNESS-NEXT: Executing Pass 'Unpack machine instruction bundles'
|
||||
; HOTNESS-NEXT: Freeing Pass 'Unpack machine instruction bundles'
|
||||
; HOTNESS-NEXT: Executing Pass 'Verify generated machine code'
|
||||
|
|
@ -59,10 +55,6 @@
|
|||
; NO_HOTNESS-NEXT: Executing Pass 'Function Pass Manager'
|
||||
; NO_HOTNESS-NEXT: Executing Pass 'Verify generated machine code'
|
||||
; NO_HOTNESS-NEXT: Freeing Pass 'Verify generated machine code'
|
||||
; NO_HOTNESS-NEXT: Executing Pass 'Insert CFI remember/restore state instructions' on Function 'empty_func'
|
||||
; NO_HOTNESS-NEXT: Freeing Pass 'Insert CFI remember/restore state instructions' on Function 'empty_func'
|
||||
; NO_HOTNESS-NEXT: Executing Pass 'Verify generated machine code'
|
||||
; NO_HOTNESS-NEXT: Freeing Pass 'Verify generated machine code'
|
||||
; NO_HOTNESS-NEXT: Executing Pass 'Unpack machine instruction bundles'
|
||||
; NO_HOTNESS-NEXT: Freeing Pass 'Unpack machine instruction bundles'
|
||||
; NO_HOTNESS-NEXT: Executing Pass 'Verify generated machine code'
|
||||
|
|
|
|||
|
|
@ -26,9 +26,6 @@ define i32 @foo(i32 %a, i32 %b) {
|
|||
; ENABLE-NEXT: ldp x29, x30, [sp, #16] ; 16-byte Folded Reload
|
||||
; ENABLE-NEXT: add sp, sp, #32
|
||||
; ENABLE-NEXT: LBB0_2: ; %false
|
||||
; ENABLE-NEXT: .cfi_def_cfa wsp, 0
|
||||
; ENABLE-NEXT: .cfi_same_value w30
|
||||
; ENABLE-NEXT: .cfi_same_value w29
|
||||
; ENABLE-NEXT: ret
|
||||
;
|
||||
; DISABLE-LABEL: foo:
|
||||
|
|
@ -99,11 +96,6 @@ define i32 @freqSaveAndRestoreOutsideLoop(i32 %cond, i32 %N) {
|
|||
; ENABLE-NEXT: ldp x20, x19, [sp], #32 ; 16-byte Folded Reload
|
||||
; ENABLE-NEXT: ret
|
||||
; ENABLE-NEXT: LBB1_4: ; %if.else
|
||||
; ENABLE-NEXT: .cfi_def_cfa wsp, 0
|
||||
; ENABLE-NEXT: .cfi_same_value w30
|
||||
; ENABLE-NEXT: .cfi_same_value w29
|
||||
; ENABLE-NEXT: .cfi_same_value w19
|
||||
; ENABLE-NEXT: .cfi_same_value w20
|
||||
; ENABLE-NEXT: lsl w0, w1, #1
|
||||
; ENABLE-NEXT: ret
|
||||
;
|
||||
|
|
@ -264,11 +256,6 @@ define i32 @loopInfoSaveOutsideLoop(i32 %cond, i32 %N) {
|
|||
; ENABLE-NEXT: ldp x20, x19, [sp], #32 ; 16-byte Folded Reload
|
||||
; ENABLE-NEXT: ret
|
||||
; ENABLE-NEXT: LBB3_4: ; %if.else
|
||||
; ENABLE-NEXT: .cfi_def_cfa wsp, 0
|
||||
; ENABLE-NEXT: .cfi_same_value w30
|
||||
; ENABLE-NEXT: .cfi_same_value w29
|
||||
; ENABLE-NEXT: .cfi_same_value w19
|
||||
; ENABLE-NEXT: .cfi_same_value w20
|
||||
; ENABLE-NEXT: lsl w0, w1, #1
|
||||
; ENABLE-NEXT: ret
|
||||
;
|
||||
|
|
@ -363,11 +350,6 @@ define i32 @loopInfoRestoreOutsideLoop(i32 %cond, i32 %N) nounwind uwtable {
|
|||
; ENABLE-NEXT: ldp x20, x19, [sp], #32 ; 16-byte Folded Reload
|
||||
; ENABLE-NEXT: ret
|
||||
; ENABLE-NEXT: LBB4_4: ; %if.else
|
||||
; ENABLE-NEXT: .cfi_def_cfa wsp, 0
|
||||
; ENABLE-NEXT: .cfi_same_value w30
|
||||
; ENABLE-NEXT: .cfi_same_value w29
|
||||
; ENABLE-NEXT: .cfi_same_value w19
|
||||
; ENABLE-NEXT: .cfi_same_value w20
|
||||
; ENABLE-NEXT: lsl w0, w1, #1
|
||||
; ENABLE-NEXT: ret
|
||||
;
|
||||
|
|
@ -473,7 +455,6 @@ define i32 @variadicFunc(i32 %cond, i32 %count, ...) nounwind uwtable {
|
|||
; ENABLE-NEXT: add sp, sp, #16
|
||||
; ENABLE-NEXT: ret
|
||||
; ENABLE-NEXT: LBB6_4: ; %if.else
|
||||
; ENABLE-NEXT: .cfi_def_cfa wsp, 0
|
||||
; ENABLE-NEXT: lsl w0, w1, #1
|
||||
; ENABLE-NEXT: ret
|
||||
;
|
||||
|
|
@ -565,9 +546,6 @@ define i32 @inlineAsm(i32 %cond, i32 %N) {
|
|||
; ENABLE-NEXT: ldp x20, x19, [sp], #16 ; 16-byte Folded Reload
|
||||
; ENABLE-NEXT: ret
|
||||
; ENABLE-NEXT: LBB7_4: ; %if.else
|
||||
; ENABLE-NEXT: .cfi_def_cfa wsp, 0
|
||||
; ENABLE-NEXT: .cfi_same_value w19
|
||||
; ENABLE-NEXT: .cfi_same_value w20
|
||||
; ENABLE-NEXT: lsl w0, w1, #1
|
||||
; ENABLE-NEXT: ret
|
||||
;
|
||||
|
|
@ -639,9 +617,6 @@ define i32 @callVariadicFunc(i32 %cond, i32 %N) {
|
|||
; ENABLE-NEXT: add sp, sp, #64
|
||||
; ENABLE-NEXT: ret
|
||||
; ENABLE-NEXT: LBB8_2: ; %if.else
|
||||
; ENABLE-NEXT: .cfi_def_cfa wsp, 0
|
||||
; ENABLE-NEXT: .cfi_same_value w30
|
||||
; ENABLE-NEXT: .cfi_same_value w29
|
||||
; ENABLE-NEXT: lsl w0, w1, #1
|
||||
; ENABLE-NEXT: ret
|
||||
;
|
||||
|
|
|
|||
|
|
@ -1,524 +0,0 @@
|
|||
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
|
||||
# RUN: llc -mtriple=aarch64 -run-pass=cfi-fixup %s -o - | FileCheck %s
|
||||
--- |
|
||||
define i32 @f0(i32 %x) #0 {
|
||||
entry: br label %return
|
||||
if.end: br label %return
|
||||
if.then2: br label %return
|
||||
if.else: br label %return
|
||||
return:
|
||||
ret i32 0
|
||||
}
|
||||
|
||||
define i32 @f1(i32 %x) #0 {
|
||||
entry: br label %return
|
||||
if.end: br label %return
|
||||
if.then2: br label %return
|
||||
if.else: br label %return
|
||||
return:
|
||||
ret i32 0
|
||||
}
|
||||
|
||||
define i32 @f2(i32 %x) #0 {
|
||||
entry: br label %return
|
||||
if.end: br label %return
|
||||
if.then2: br label %return
|
||||
if.else: br label %return
|
||||
return:
|
||||
ret i32 0
|
||||
}
|
||||
|
||||
declare i32 @g(i32)
|
||||
|
||||
attributes #0 = { nounwind shadowcallstack uwtable "sign-return-address"="non-leaf" "target-features"="+reserve-x18" }
|
||||
|
||||
...
|
||||
---
|
||||
name: f0
|
||||
alignment: 4
|
||||
exposesReturnsTwice: false
|
||||
legalized: false
|
||||
regBankSelected: false
|
||||
selected: false
|
||||
failedISel: false
|
||||
tracksRegLiveness: true
|
||||
hasWinCFI: false
|
||||
failsVerification: false
|
||||
registers: []
|
||||
liveins:
|
||||
- { reg: '$w0', virtual-reg: '' }
|
||||
frameInfo:
|
||||
isFrameAddressTaken: false
|
||||
isReturnAddressTaken: false
|
||||
hasStackMap: false
|
||||
hasPatchPoint: false
|
||||
stackSize: 16
|
||||
offsetAdjustment: 0
|
||||
maxAlignment: 16
|
||||
adjustsStack: true
|
||||
hasCalls: true
|
||||
stackProtector: ''
|
||||
maxCallFrameSize: 0
|
||||
cvBytesOfCalleeSavedRegisters: 0
|
||||
hasOpaqueSPAdjustment: false
|
||||
hasVAStart: false
|
||||
hasMustTailInVarArgFunc: false
|
||||
hasTailCall: false
|
||||
localFrameSize: 0
|
||||
savePoint: ''
|
||||
restorePoint: ''
|
||||
fixedStack: []
|
||||
stack:
|
||||
- { id: 0, name: '', type: spill-slot, offset: -16, size: 8, alignment: 16,
|
||||
stack-id: default, callee-saved-register: '$lr', callee-saved-restored: true,
|
||||
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
|
||||
callSites: []
|
||||
debugValueSubstitutions: []
|
||||
constants: []
|
||||
machineFunctionInfo:
|
||||
hasRedZone: false
|
||||
body: |
|
||||
; CHECK-LABEL: name: f0
|
||||
; CHECK: bb.0.entry:
|
||||
; CHECK-NEXT: successors: %bb.4(0x30000000), %bb.1(0x50000000)
|
||||
; CHECK-NEXT: liveins: $w0, $lr, $x18
|
||||
; CHECK-NEXT: {{ $}}
|
||||
; CHECK-NEXT: CBZW renamable $w0, %bb.4
|
||||
; CHECK-NEXT: {{ $}}
|
||||
; CHECK-NEXT: bb.1.if.end:
|
||||
; CHECK-NEXT: successors: %bb.3(0x30000000), %bb.2(0x50000000)
|
||||
; CHECK-NEXT: liveins: $w0, $lr, $x18
|
||||
; CHECK-NEXT: {{ $}}
|
||||
; CHECK-NEXT: early-clobber $x18 = frame-setup STRXpost $lr, $x18, 8
|
||||
; CHECK-NEXT: frame-setup CFI_INSTRUCTION escape 0x16, 0x12, 0x02, 0x82, 0x78
|
||||
; CHECK-NEXT: frame-setup PACIASP implicit-def $lr, implicit killed $lr, implicit $sp
|
||||
; CHECK-NEXT: frame-setup CFI_INSTRUCTION negate_ra_sign_state
|
||||
; CHECK-NEXT: early-clobber $sp = frame-setup STRXpre killed $lr, $sp, -16 :: (store (s64) into %stack.0)
|
||||
; CHECK-NEXT: frame-setup CFI_INSTRUCTION def_cfa_offset 16
|
||||
; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $w30, -16
|
||||
; CHECK-NEXT: CFI_INSTRUCTION remember_state
|
||||
; CHECK-NEXT: TBNZW renamable $w0, 31, %bb.3
|
||||
; CHECK-NEXT: {{ $}}
|
||||
; CHECK-NEXT: bb.2.if.else:
|
||||
; CHECK-NEXT: successors: %bb.5(0x80000000)
|
||||
; CHECK-NEXT: liveins: $w0
|
||||
; CHECK-NEXT: {{ $}}
|
||||
; CHECK-NEXT: renamable $w0 = nuw nsw ADDWri killed renamable $w0, 1, 0
|
||||
; CHECK-NEXT: BL @g, csr_aarch64_aapcs_scs, implicit-def dead $lr, implicit $sp, implicit killed $w0, implicit-def $sp, implicit-def $w0
|
||||
; CHECK-NEXT: renamable $w8 = MOVZWi 1, 0
|
||||
; CHECK-NEXT: $w0 = SUBWrs killed renamable $w8, killed renamable $w0, 0
|
||||
; CHECK-NEXT: B %bb.5
|
||||
; CHECK-NEXT: {{ $}}
|
||||
; CHECK-NEXT: bb.3.if.then2:
|
||||
; CHECK-NEXT: successors: %bb.5(0x80000000)
|
||||
; CHECK-NEXT: liveins: $w0
|
||||
; CHECK-NEXT: {{ $}}
|
||||
; CHECK-NEXT: renamable $w0 = nsw SUBWri killed renamable $w0, 1, 0
|
||||
; CHECK-NEXT: BL @g, csr_aarch64_aapcs_scs, implicit-def dead $lr, implicit $sp, implicit killed $w0, implicit-def $sp, implicit-def $w0
|
||||
; CHECK-NEXT: renamable $w0 = nsw ADDWri killed renamable $w0, 1, 0
|
||||
; CHECK-NEXT: B %bb.5
|
||||
; CHECK-NEXT: {{ $}}
|
||||
; CHECK-NEXT: bb.4.return:
|
||||
; CHECK-NEXT: liveins: $w0
|
||||
; CHECK-NEXT: {{ $}}
|
||||
; CHECK-NEXT: CFI_INSTRUCTION def_cfa $wsp, 0
|
||||
; CHECK-NEXT: CFI_INSTRUCTION negate_ra_sign_state
|
||||
; CHECK-NEXT: CFI_INSTRUCTION same_value $w18
|
||||
; CHECK-NEXT: CFI_INSTRUCTION same_value $w30
|
||||
; CHECK-NEXT: RET undef $lr, implicit killed $w0
|
||||
; CHECK-NEXT: {{ $}}
|
||||
; CHECK-NEXT: bb.5.return:
|
||||
; CHECK-NEXT: successors: %bb.7(0x80000000)
|
||||
; CHECK-NEXT: liveins: $w0
|
||||
; CHECK-NEXT: {{ $}}
|
||||
; CHECK-NEXT: CFI_INSTRUCTION restore_state
|
||||
; CHECK-NEXT: CFI_INSTRUCTION remember_state
|
||||
; CHECK-NEXT: B %bb.7
|
||||
; CHECK-NEXT: {{ $}}
|
||||
; CHECK-NEXT: bb.6.return:
|
||||
; CHECK-NEXT: liveins: $w0
|
||||
; CHECK-NEXT: {{ $}}
|
||||
; CHECK-NEXT: early-clobber $sp, $lr = frame-destroy LDRXpost $sp, 16 :: (load (s64) from %stack.0)
|
||||
; CHECK-NEXT: frame-destroy CFI_INSTRUCTION def_cfa_offset 0
|
||||
; CHECK-NEXT: frame-destroy AUTIASP implicit-def $lr, implicit killed $lr, implicit $sp
|
||||
; CHECK-NEXT: frame-destroy CFI_INSTRUCTION negate_ra_sign_state
|
||||
; CHECK-NEXT: early-clobber $x18, $lr = frame-destroy LDRXpre $x18, -8
|
||||
; CHECK-NEXT: frame-destroy CFI_INSTRUCTION restore $w18
|
||||
; CHECK-NEXT: frame-destroy CFI_INSTRUCTION restore $w30
|
||||
; CHECK-NEXT: RET undef $lr, implicit killed $w0
|
||||
; CHECK-NEXT: {{ $}}
|
||||
; CHECK-NEXT: bb.7.return:
|
||||
; CHECK-NEXT: successors: %bb.6(0x80000000)
|
||||
; CHECK-NEXT: liveins: $w0
|
||||
; CHECK-NEXT: {{ $}}
|
||||
; CHECK-NEXT: CFI_INSTRUCTION restore_state
|
||||
; CHECK-NEXT: B %bb.6
|
||||
bb.0.entry:
|
||||
successors: %bb.4(0x30000000), %bb.1(0x50000000)
|
||||
liveins: $w0, $lr, $x18
|
||||
|
||||
CBZW renamable $w0, %bb.4
|
||||
|
||||
bb.1.if.end:
|
||||
successors: %bb.3(0x30000000), %bb.2(0x50000000)
|
||||
liveins: $w0, $lr, $x18
|
||||
|
||||
early-clobber $x18 = frame-setup STRXpost $lr, $x18, 8
|
||||
frame-setup CFI_INSTRUCTION escape 0x16, 0x12, 0x02, 0x82, 0x78
|
||||
frame-setup PACIASP implicit-def $lr, implicit killed $lr, implicit $sp
|
||||
frame-setup CFI_INSTRUCTION negate_ra_sign_state
|
||||
early-clobber $sp = frame-setup STRXpre killed $lr, $sp, -16 :: (store (s64) into %stack.0)
|
||||
frame-setup CFI_INSTRUCTION def_cfa_offset 16
|
||||
frame-setup CFI_INSTRUCTION offset $w30, -16
|
||||
TBNZW renamable $w0, 31, %bb.3
|
||||
|
||||
bb.2.if.else:
|
||||
successors: %bb.5(0x80000000)
|
||||
liveins: $w0
|
||||
|
||||
renamable $w0 = nuw nsw ADDWri killed renamable $w0, 1, 0
|
||||
BL @g, csr_aarch64_aapcs_scs, implicit-def dead $lr, implicit $sp, implicit killed $w0, implicit-def $sp, implicit-def $w0
|
||||
renamable $w8 = MOVZWi 1, 0
|
||||
$w0 = SUBWrs killed renamable $w8, killed renamable $w0, 0
|
||||
B %bb.5
|
||||
|
||||
bb.3.if.then2:
|
||||
successors: %bb.5(0x80000000)
|
||||
liveins: $w0
|
||||
|
||||
renamable $w0 = nsw SUBWri killed renamable $w0, 1, 0
|
||||
BL @g, csr_aarch64_aapcs_scs, implicit-def dead $lr, implicit $sp, implicit killed $w0, implicit-def $sp, implicit-def $w0
|
||||
renamable $w0 = nsw ADDWri killed renamable $w0, 1, 0
|
||||
B %bb.5
|
||||
|
||||
bb.4.return:
|
||||
liveins: $w0
|
||||
RET undef $lr, implicit killed $w0
|
||||
|
||||
bb.5.return:
|
||||
liveins: $w0
|
||||
B %bb.6
|
||||
|
||||
bb.7.return:
|
||||
liveins: $w0
|
||||
early-clobber $sp, $lr = frame-destroy LDRXpost $sp, 16 :: (load (s64) from %stack.0)
|
||||
frame-destroy CFI_INSTRUCTION def_cfa_offset 0
|
||||
frame-destroy AUTIASP implicit-def $lr, implicit killed $lr, implicit $sp
|
||||
frame-destroy CFI_INSTRUCTION negate_ra_sign_state
|
||||
early-clobber $x18, $lr = frame-destroy LDRXpre $x18, -8
|
||||
frame-destroy CFI_INSTRUCTION restore $w18
|
||||
frame-destroy CFI_INSTRUCTION restore $w30
|
||||
RET undef $lr, implicit killed $w0
|
||||
|
||||
bb.6.return:
|
||||
liveins: $w0
|
||||
B %bb.7
|
||||
|
||||
|
||||
...
|
||||
---
|
||||
name: f1
|
||||
alignment: 4
|
||||
exposesReturnsTwice: false
|
||||
legalized: false
|
||||
regBankSelected: false
|
||||
selected: false
|
||||
failedISel: false
|
||||
tracksRegLiveness: true
|
||||
hasWinCFI: false
|
||||
failsVerification: false
|
||||
registers: []
|
||||
liveins:
|
||||
- { reg: '$w0', virtual-reg: '' }
|
||||
frameInfo:
|
||||
isFrameAddressTaken: false
|
||||
isReturnAddressTaken: false
|
||||
hasStackMap: false
|
||||
hasPatchPoint: false
|
||||
stackSize: 16
|
||||
offsetAdjustment: 0
|
||||
maxAlignment: 16
|
||||
adjustsStack: true
|
||||
hasCalls: true
|
||||
stackProtector: ''
|
||||
maxCallFrameSize: 0
|
||||
cvBytesOfCalleeSavedRegisters: 0
|
||||
hasOpaqueSPAdjustment: false
|
||||
hasVAStart: false
|
||||
hasMustTailInVarArgFunc: false
|
||||
hasTailCall: false
|
||||
localFrameSize: 0
|
||||
savePoint: ''
|
||||
restorePoint: ''
|
||||
fixedStack: []
|
||||
stack:
|
||||
- { id: 0, name: '', type: spill-slot, offset: -16, size: 8, alignment: 16,
|
||||
stack-id: default, callee-saved-register: '$lr', callee-saved-restored: true,
|
||||
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
|
||||
callSites: []
|
||||
debugValueSubstitutions: []
|
||||
constants: []
|
||||
machineFunctionInfo:
|
||||
hasRedZone: false
|
||||
body: |
|
||||
; CHECK-LABEL: name: f1
|
||||
; CHECK: bb.0.entry:
|
||||
; CHECK-NEXT: successors: %bb.5(0x30000000), %bb.1(0x50000000)
|
||||
; CHECK-NEXT: liveins: $w0, $lr, $x18
|
||||
; CHECK-NEXT: {{ $}}
|
||||
; CHECK-NEXT: CBZW renamable $w0, %bb.5
|
||||
; CHECK-NEXT: {{ $}}
|
||||
; CHECK-NEXT: bb.1.if.end:
|
||||
; CHECK-NEXT: successors: %bb.3(0x30000000), %bb.2(0x50000000)
|
||||
; CHECK-NEXT: liveins: $w0, $lr, $x18
|
||||
; CHECK-NEXT: {{ $}}
|
||||
; CHECK-NEXT: early-clobber $x18 = frame-setup STRXpost $lr, $x18, 8
|
||||
; CHECK-NEXT: frame-setup CFI_INSTRUCTION escape 0x16, 0x12, 0x02, 0x82, 0x78
|
||||
; CHECK-NEXT: frame-setup PACIASP implicit-def $lr, implicit killed $lr, implicit $sp
|
||||
; CHECK-NEXT: frame-setup CFI_INSTRUCTION negate_ra_sign_state
|
||||
; CHECK-NEXT: early-clobber $sp = frame-setup STRXpre killed $lr, $sp, -16 :: (store (s64) into %stack.0)
|
||||
; CHECK-NEXT: frame-setup CFI_INSTRUCTION def_cfa_offset 16
|
||||
; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $w30, -16
|
||||
; CHECK-NEXT: TBNZW renamable $w0, 31, %bb.3
|
||||
; CHECK-NEXT: {{ $}}
|
||||
; CHECK-NEXT: bb.2.if.else:
|
||||
; CHECK-NEXT: successors: %bb.4(0x80000000)
|
||||
; CHECK-NEXT: liveins: $w0
|
||||
; CHECK-NEXT: {{ $}}
|
||||
; CHECK-NEXT: renamable $w0 = nuw nsw ADDWri killed renamable $w0, 1, 0
|
||||
; CHECK-NEXT: BL @g, csr_aarch64_aapcs_scs, implicit-def dead $lr, implicit $sp, implicit killed $w0, implicit-def $sp, implicit-def $w0
|
||||
; CHECK-NEXT: renamable $w8 = MOVZWi 1, 0
|
||||
; CHECK-NEXT: $w0 = SUBWrs killed renamable $w8, killed renamable $w0, 0
|
||||
; CHECK-NEXT: B %bb.4
|
||||
; CHECK-NEXT: {{ $}}
|
||||
; CHECK-NEXT: bb.3.if.then2:
|
||||
; CHECK-NEXT: successors: %bb.4(0x80000000)
|
||||
; CHECK-NEXT: liveins: $w0
|
||||
; CHECK-NEXT: {{ $}}
|
||||
; CHECK-NEXT: renamable $w0 = nsw SUBWri killed renamable $w0, 1, 0
|
||||
; CHECK-NEXT: BL @g, csr_aarch64_aapcs_scs, implicit-def dead $lr, implicit $sp, implicit killed $w0, implicit-def $sp, implicit-def $w0
|
||||
; CHECK-NEXT: renamable $w0 = nsw ADDWri killed renamable $w0, 1, 0
|
||||
; CHECK-NEXT: B %bb.4
|
||||
; CHECK-NEXT: {{ $}}
|
||||
; CHECK-NEXT: bb.4.return:
|
||||
; CHECK-NEXT: liveins: $w0
|
||||
; CHECK-NEXT: {{ $}}
|
||||
; CHECK-NEXT: early-clobber $sp, $lr = frame-destroy LDRXpost $sp, 16 :: (load (s64) from %stack.0)
|
||||
; CHECK-NEXT: frame-destroy CFI_INSTRUCTION def_cfa_offset 0
|
||||
; CHECK-NEXT: frame-destroy AUTIASP implicit-def $lr, implicit killed $lr, implicit $sp
|
||||
; CHECK-NEXT: frame-destroy CFI_INSTRUCTION negate_ra_sign_state
|
||||
; CHECK-NEXT: early-clobber $x18, $lr = frame-destroy LDRXpre $x18, -8
|
||||
; CHECK-NEXT: frame-destroy CFI_INSTRUCTION restore $w18
|
||||
; CHECK-NEXT: frame-destroy CFI_INSTRUCTION restore $w30
|
||||
; CHECK-NEXT: RET undef $lr, implicit killed $w0
|
||||
; CHECK-NEXT: {{ $}}
|
||||
; CHECK-NEXT: bb.5.return:
|
||||
; CHECK-NEXT: liveins: $w0
|
||||
; CHECK-NEXT: {{ $}}
|
||||
; CHECK-NEXT: RET undef $lr, implicit killed $w0
|
||||
bb.0.entry:
|
||||
successors: %bb.5(0x30000000), %bb.1(0x50000000)
|
||||
liveins: $w0, $lr, $x18
|
||||
|
||||
CBZW renamable $w0, %bb.5
|
||||
|
||||
bb.1.if.end:
|
||||
successors: %bb.3(0x30000000), %bb.2(0x50000000)
|
||||
liveins: $w0, $lr, $x18
|
||||
|
||||
early-clobber $x18 = frame-setup STRXpost $lr, $x18, 8
|
||||
frame-setup CFI_INSTRUCTION escape 0x16, 0x12, 0x02, 0x82, 0x78
|
||||
frame-setup PACIASP implicit-def $lr, implicit killed $lr, implicit $sp
|
||||
frame-setup CFI_INSTRUCTION negate_ra_sign_state
|
||||
early-clobber $sp = frame-setup STRXpre killed $lr, $sp, -16 :: (store (s64) into %stack.0)
|
||||
frame-setup CFI_INSTRUCTION def_cfa_offset 16
|
||||
frame-setup CFI_INSTRUCTION offset $w30, -16
|
||||
TBNZW renamable $w0, 31, %bb.3
|
||||
|
||||
bb.2.if.else:
|
||||
successors: %bb.4(0x80000000)
|
||||
liveins: $w0
|
||||
|
||||
renamable $w0 = nuw nsw ADDWri killed renamable $w0, 1, 0
|
||||
BL @g, csr_aarch64_aapcs_scs, implicit-def dead $lr, implicit $sp, implicit killed $w0, implicit-def $sp, implicit-def $w0
|
||||
renamable $w8 = MOVZWi 1, 0
|
||||
$w0 = SUBWrs killed renamable $w8, killed renamable $w0, 0
|
||||
B %bb.4
|
||||
|
||||
bb.3.if.then2:
|
||||
successors: %bb.4(0x80000000)
|
||||
liveins: $w0
|
||||
|
||||
renamable $w0 = nsw SUBWri killed renamable $w0, 1, 0
|
||||
BL @g, csr_aarch64_aapcs_scs, implicit-def dead $lr, implicit $sp, implicit killed $w0, implicit-def $sp, implicit-def $w0
|
||||
renamable $w0 = nsw ADDWri killed renamable $w0, 1, 0
|
||||
B %bb.4
|
||||
|
||||
bb.4.return:
|
||||
liveins: $w0
|
||||
|
||||
early-clobber $sp, $lr = frame-destroy LDRXpost $sp, 16 :: (load (s64) from %stack.0)
|
||||
frame-destroy CFI_INSTRUCTION def_cfa_offset 0
|
||||
frame-destroy AUTIASP implicit-def $lr, implicit killed $lr, implicit $sp
|
||||
frame-destroy CFI_INSTRUCTION negate_ra_sign_state
|
||||
early-clobber $x18, $lr = frame-destroy LDRXpre $x18, -8
|
||||
frame-destroy CFI_INSTRUCTION restore $w18
|
||||
frame-destroy CFI_INSTRUCTION restore $w30
|
||||
RET undef $lr, implicit killed $w0
|
||||
|
||||
bb.5.return:
|
||||
liveins: $w0
|
||||
RET undef $lr, implicit killed $w0
|
||||
|
||||
...
|
||||
---
|
||||
name: f2
|
||||
alignment: 4
|
||||
exposesReturnsTwice: false
|
||||
legalized: false
|
||||
regBankSelected: false
|
||||
selected: false
|
||||
failedISel: false
|
||||
tracksRegLiveness: true
|
||||
hasWinCFI: false
|
||||
failsVerification: false
|
||||
registers: []
|
||||
liveins:
|
||||
- { reg: '$w0', virtual-reg: '' }
|
||||
frameInfo:
|
||||
isFrameAddressTaken: false
|
||||
isReturnAddressTaken: false
|
||||
hasStackMap: false
|
||||
hasPatchPoint: false
|
||||
stackSize: 16
|
||||
offsetAdjustment: 0
|
||||
maxAlignment: 16
|
||||
adjustsStack: true
|
||||
hasCalls: true
|
||||
stackProtector: ''
|
||||
maxCallFrameSize: 0
|
||||
cvBytesOfCalleeSavedRegisters: 0
|
||||
hasOpaqueSPAdjustment: false
|
||||
hasVAStart: false
|
||||
hasMustTailInVarArgFunc: false
|
||||
hasTailCall: false
|
||||
localFrameSize: 0
|
||||
savePoint: ''
|
||||
restorePoint: ''
|
||||
fixedStack: []
|
||||
stack:
|
||||
- { id: 0, name: '', type: spill-slot, offset: -16, size: 8, alignment: 16,
|
||||
stack-id: default, callee-saved-register: '$lr', callee-saved-restored: true,
|
||||
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
|
||||
callSites: []
|
||||
debugValueSubstitutions: []
|
||||
constants: []
|
||||
machineFunctionInfo:
|
||||
hasRedZone: false
|
||||
body: |
|
||||
; CHECK-LABEL: name: f2
|
||||
; CHECK: bb.0.entry:
|
||||
; CHECK-NEXT: successors: %bb.5(0x30000000), %bb.1(0x50000000)
|
||||
; CHECK-NEXT: liveins: $w0, $lr, $x18
|
||||
; CHECK-NEXT: {{ $}}
|
||||
; CHECK-NEXT: CBZW renamable $w0, %bb.5
|
||||
; CHECK-NEXT: {{ $}}
|
||||
; CHECK-NEXT: bb.1.if.end:
|
||||
; CHECK-NEXT: successors: %bb.3(0x30000000), %bb.2(0x50000000)
|
||||
; CHECK-NEXT: liveins: $w0, $lr, $x18
|
||||
; CHECK-NEXT: {{ $}}
|
||||
; CHECK-NEXT: early-clobber $x18 = frame-setup STRXpost $lr, $x18, 8
|
||||
; CHECK-NEXT: frame-setup CFI_INSTRUCTION escape 0x16, 0x12, 0x02, 0x82, 0x78
|
||||
; CHECK-NEXT: frame-setup PACIASP implicit-def $lr, implicit killed $lr, implicit $sp
|
||||
; CHECK-NEXT: frame-setup CFI_INSTRUCTION negate_ra_sign_state
|
||||
; CHECK-NEXT: early-clobber $sp = frame-setup STRXpre killed $lr, $sp, -16 :: (store (s64) into %stack.0)
|
||||
; CHECK-NEXT: frame-setup CFI_INSTRUCTION def_cfa_offset 16
|
||||
; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $w30, -16
|
||||
; CHECK-NEXT: TBNZW renamable $w0, 31, %bb.3
|
||||
; CHECK-NEXT: {{ $}}
|
||||
; CHECK-NEXT: bb.2.if.else:
|
||||
; CHECK-NEXT: successors: %bb.4(0x80000000)
|
||||
; CHECK-NEXT: liveins: $w0
|
||||
; CHECK-NEXT: {{ $}}
|
||||
; CHECK-NEXT: renamable $w0 = nuw nsw ADDWri killed renamable $w0, 1, 0
|
||||
; CHECK-NEXT: BL @g, csr_aarch64_aapcs_scs, implicit-def dead $lr, implicit $sp, implicit killed $w0, implicit-def $sp, implicit-def $w0
|
||||
; CHECK-NEXT: renamable $w8 = MOVZWi 1, 0
|
||||
; CHECK-NEXT: $w0 = SUBWrs killed renamable $w8, killed renamable $w0, 0
|
||||
; CHECK-NEXT: B %bb.4
|
||||
; CHECK-NEXT: {{ $}}
|
||||
; CHECK-NEXT: bb.3.if.then2:
|
||||
; CHECK-NEXT: successors: %bb.4(0x80000000)
|
||||
; CHECK-NEXT: liveins: $w0
|
||||
; CHECK-NEXT: {{ $}}
|
||||
; CHECK-NEXT: renamable $w0 = nsw SUBWri killed renamable $w0, 1, 0
|
||||
; CHECK-NEXT: BL @g, csr_aarch64_aapcs_scs, implicit-def dead $lr, implicit $sp, implicit killed $w0, implicit-def $sp, implicit-def $w0
|
||||
; CHECK-NEXT: renamable $w0 = nsw ADDWri killed renamable $w0, 1, 0
|
||||
; CHECK-NEXT: B %bb.4
|
||||
; CHECK-NEXT: {{ $}}
|
||||
; CHECK-NEXT: bb.4.return:
|
||||
; CHECK-NEXT: liveins: $w0
|
||||
; CHECK-NEXT: {{ $}}
|
||||
; CHECK-NEXT: early-clobber $sp, $lr = frame-destroy LDRXpost $sp, 16 :: (load (s64) from %stack.0)
|
||||
; CHECK-NEXT: frame-destroy AUTIASP implicit-def $lr, implicit killed $lr, implicit $sp
|
||||
; CHECK-NEXT: early-clobber $x18, $lr = frame-destroy LDRXpre $x18, -8
|
||||
; CHECK-NEXT: RET undef $lr, implicit killed $w0
|
||||
; CHECK-NEXT: {{ $}}
|
||||
; CHECK-NEXT: bb.5.return:
|
||||
; CHECK-NEXT: liveins: $w0
|
||||
; CHECK-NEXT: {{ $}}
|
||||
; CHECK-NEXT: CFI_INSTRUCTION def_cfa $wsp, 0
|
||||
; CHECK-NEXT: CFI_INSTRUCTION negate_ra_sign_state
|
||||
; CHECK-NEXT: CFI_INSTRUCTION same_value $w18
|
||||
; CHECK-NEXT: CFI_INSTRUCTION same_value $w30
|
||||
; CHECK-NEXT: RET undef $lr, implicit killed $w0
|
||||
bb.0.entry:
|
||||
successors: %bb.5(0x30000000), %bb.1(0x50000000)
|
||||
liveins: $w0, $lr, $x18
|
||||
|
||||
CBZW renamable $w0, %bb.5
|
||||
|
||||
bb.1.if.end:
|
||||
successors: %bb.3(0x30000000), %bb.2(0x50000000)
|
||||
liveins: $w0, $lr, $x18
|
||||
|
||||
early-clobber $x18 = frame-setup STRXpost $lr, $x18, 8
|
||||
frame-setup CFI_INSTRUCTION escape 0x16, 0x12, 0x02, 0x82, 0x78
|
||||
frame-setup PACIASP implicit-def $lr, implicit killed $lr, implicit $sp
|
||||
frame-setup CFI_INSTRUCTION negate_ra_sign_state
|
||||
early-clobber $sp = frame-setup STRXpre killed $lr, $sp, -16 :: (store (s64) into %stack.0)
|
||||
frame-setup CFI_INSTRUCTION def_cfa_offset 16
|
||||
frame-setup CFI_INSTRUCTION offset $w30, -16
|
||||
TBNZW renamable $w0, 31, %bb.3
|
||||
|
||||
bb.2.if.else:
|
||||
successors: %bb.4(0x80000000)
|
||||
liveins: $w0
|
||||
|
||||
renamable $w0 = nuw nsw ADDWri killed renamable $w0, 1, 0
|
||||
BL @g, csr_aarch64_aapcs_scs, implicit-def dead $lr, implicit $sp, implicit killed $w0, implicit-def $sp, implicit-def $w0
|
||||
renamable $w8 = MOVZWi 1, 0
|
||||
$w0 = SUBWrs killed renamable $w8, killed renamable $w0, 0
|
||||
B %bb.4
|
||||
|
||||
bb.3.if.then2:
|
||||
successors: %bb.4(0x80000000)
|
||||
liveins: $w0
|
||||
|
||||
renamable $w0 = nsw SUBWri killed renamable $w0, 1, 0
|
||||
BL @g, csr_aarch64_aapcs_scs, implicit-def dead $lr, implicit $sp, implicit killed $w0, implicit-def $sp, implicit-def $w0
|
||||
renamable $w0 = nsw ADDWri killed renamable $w0, 1, 0
|
||||
B %bb.4
|
||||
|
||||
bb.4.return:
|
||||
liveins: $w0
|
||||
|
||||
early-clobber $sp, $lr = frame-destroy LDRXpost $sp, 16 :: (load (s64) from %stack.0)
|
||||
frame-destroy AUTIASP implicit-def $lr, implicit killed $lr, implicit $sp
|
||||
early-clobber $x18, $lr = frame-destroy LDRXpre $x18, -8
|
||||
RET undef $lr, implicit killed $w0
|
||||
|
||||
bb.5.return:
|
||||
liveins: $w0
|
||||
RET undef $lr, implicit killed $w0
|
||||
|
||||
...
|
||||
|
|
@ -153,9 +153,6 @@ define i64 @test_or_unpredictable(i32 %a, i32 %b) {
|
|||
; CHECK-NEXT: bl _bar
|
||||
; CHECK-NEXT: ldp x29, x30, [sp], #16 ; 16-byte Folded Reload
|
||||
; CHECK-NEXT: LBB4_2: ; %common.ret
|
||||
; CHECK-NEXT: .cfi_def_cfa wsp, 0
|
||||
; CHECK-NEXT: .cfi_same_value w30
|
||||
; CHECK-NEXT: .cfi_same_value w29
|
||||
; CHECK-NEXT: ret
|
||||
bb1:
|
||||
%0 = icmp eq i32 %a, 0
|
||||
|
|
@ -189,9 +186,6 @@ define i64 @test_and_unpredictable(i32 %a, i32 %b) {
|
|||
; CHECK-NEXT: bl _bar
|
||||
; CHECK-NEXT: ldp x29, x30, [sp], #16 ; 16-byte Folded Reload
|
||||
; CHECK-NEXT: LBB5_2: ; %common.ret
|
||||
; CHECK-NEXT: .cfi_def_cfa wsp, 0
|
||||
; CHECK-NEXT: .cfi_same_value w30
|
||||
; CHECK-NEXT: .cfi_same_value w29
|
||||
; CHECK-NEXT: ret
|
||||
bb1:
|
||||
%0 = icmp ne i32 %a, 0
|
||||
|
|
|
|||
|
|
@ -1,26 +1,6 @@
|
|||
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
|
||||
; RUN: llc < %s -mtriple=aarch64 -o - | FileCheck %s
|
||||
|
||||
define void @foo(i32 %i) uwtable {
|
||||
; CHECK-LABEL: foo:
|
||||
; CHECK: // %bb.0: // %entry
|
||||
; CHECK-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
|
||||
; CHECK-NEXT: .cfi_def_cfa_offset 16
|
||||
; CHECK-NEXT: .cfi_offset w30, -16
|
||||
; CHECK-NEXT: cmp w0, #7
|
||||
; CHECK-NEXT: b.eq .LBB0_3
|
||||
; CHECK-NEXT: // %bb.1: // %entry
|
||||
; CHECK-NEXT: cmp w0, #5
|
||||
; CHECK-NEXT: b.ne .LBB0_4
|
||||
; CHECK-NEXT: // %bb.2: // %if.then
|
||||
; CHECK-NEXT: bl bar
|
||||
; CHECK-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
|
||||
; CHECK-NEXT: b bar
|
||||
; CHECK-NEXT: .LBB0_3: // %if.then2
|
||||
; CHECK-NEXT: bl bar
|
||||
; CHECK-NEXT: .LBB0_4: // %if.end3
|
||||
; CHECK-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
|
||||
; CHECK-NEXT: b bar
|
||||
define void @foo(i32 %i) {
|
||||
entry:
|
||||
switch i32 %i, label %if.end3 [
|
||||
i32 5, label %if.then
|
||||
|
|
@ -43,3 +23,14 @@ if.end3:
|
|||
declare void @bar()
|
||||
|
||||
attributes #0 = { nomerge }
|
||||
|
||||
; CHECK-LABEL: foo:
|
||||
; CHECK: // %bb.0: // %entry
|
||||
; CHECK: // %bb.1: // %entry
|
||||
; CHECK: // %bb.2: // %if.then
|
||||
; CHECK-NEXT: bl bar
|
||||
; CHECK: b bar
|
||||
; CHECK: .LBB0_3: // %if.then2
|
||||
; CHECK-NEXT: bl bar
|
||||
; CHECK: .LBB0_4: // %if.end3
|
||||
; CHECK: b bar
|
||||
|
|
|
|||
|
|
@ -26,8 +26,6 @@ define void @func() {
|
|||
; CHECK-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
|
||||
; CHECK-NEXT: cbz w0, .LBB0_5
|
||||
; CHECK-NEXT: .LBB0_3: // %common.ret.sink.split
|
||||
; CHECK-NEXT: .cfi_def_cfa wsp, 0
|
||||
; CHECK-NEXT: .cfi_same_value w30
|
||||
; CHECK-NEXT: b extfunc
|
||||
; CHECK-NEXT: .LBB0_4: // %b2
|
||||
; CHECK-NEXT: bl extfunc
|
||||
|
|
|
|||
|
|
@ -99,19 +99,6 @@ define void @foo(<vscale x 4 x i64> %dst, i1 %cond) {
|
|||
; CHECK-NEXT: ldp x28, x19, [sp, #16] // 16-byte Folded Reload
|
||||
; CHECK-NEXT: ldp x29, x30, [sp], #32 // 16-byte Folded Reload
|
||||
; CHECK-NEXT: .LBB0_2: // %if.end
|
||||
; CHECK-NEXT: .cfi_def_cfa wsp, 0
|
||||
; CHECK-NEXT: .cfi_same_value b8
|
||||
; CHECK-NEXT: .cfi_same_value b9
|
||||
; CHECK-NEXT: .cfi_same_value b10
|
||||
; CHECK-NEXT: .cfi_same_value b11
|
||||
; CHECK-NEXT: .cfi_same_value b12
|
||||
; CHECK-NEXT: .cfi_same_value b13
|
||||
; CHECK-NEXT: .cfi_same_value b14
|
||||
; CHECK-NEXT: .cfi_same_value b15
|
||||
; CHECK-NEXT: .cfi_same_value w19
|
||||
; CHECK-NEXT: .cfi_same_value w28
|
||||
; CHECK-NEXT: .cfi_same_value w30
|
||||
; CHECK-NEXT: .cfi_same_value w29
|
||||
; CHECK-NEXT: ret
|
||||
entry:
|
||||
br i1 %cond, label %if.then, label %if.end
|
||||
|
|
|
|||
Loading…
Reference in New Issue