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[X86] Add test case to demonstrate that we don't allow masks wider than 6 bits in the (shift x, (and y, mask)) patterns for the 64-bit memory form. 

We allow wider than 5 bits in the 16 and 32 bit store forms. And we allow wider than 6 bits on the 64-bit regsiter form.:w

I'm assuming this was a mistake made back in r148024.

llvm-svn: 308656
This commit is contained in:
Craig Topper 2017-07-20 19:29:56 +00:00
parent e9f0c1e031
commit 02959b3d05
1 changed files with 15 additions and 0 deletions
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15
llvm/test/CodeGen/X86/shift-and.ll
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@ -96,6 +96,21 @@ define i64 @t5(i64 %t, i64 %val) nounwind {
ret i64 %res
}
define void @t5ptr(i64 %t, i64* %ptr) nounwind {
; X64-LABEL: t5ptr:
; X64: ## BB#0:
; X64-NEXT: andb $-65, %dil
; X64-NEXT: movl %edi, %ecx
; X64-NEXT: shrq %cl, (%rsi)
; X64-NEXT: retq
; X64-NEXT: ## -- End function
%shamt = and i64 %t, 191
%tmp = load i64, i64* %ptr
%tmp1 = lshr i64 %tmp, %shamt
store i64 %tmp1, i64* %ptr
ret void
}
; rdar://11866926
define i64 @t6(i64 %key, i64* nocapture %val) nounwind {