forked from OSchip/llvm-project
[RISCV] Only custom legalize i32 arguments to vector intrinsics on RV64.
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@ -340,9 +340,12 @@ RISCVTargetLowering::RISCVTargetLowering(const TargetMachine &TM,
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if (Subtarget.hasStdExtV()) {
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setBooleanVectorContents(ZeroOrOneBooleanContent);
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// RVV intrinsics may have illegal operands.
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for (auto VT : {MVT::i8, MVT::i16, MVT::i32})
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setOperationAction(ISD::INTRINSIC_WO_CHAIN, VT, Custom);
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setOperationAction(ISD::INTRINSIC_WO_CHAIN, MVT::i8, Custom);
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setOperationAction(ISD::INTRINSIC_WO_CHAIN, MVT::i16, Custom);
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if (Subtarget.is64Bit())
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setOperationAction(ISD::INTRINSIC_WO_CHAIN, MVT::i32, Custom);
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}
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// Function alignments.
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