forked from OSchip/llvm-project
Reorder some members in MCRegisterClass to remove padding on 64-bit builds.
llvm-svn: 151043
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2d2f1711b7
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028a6721c9
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@ -28,14 +28,14 @@ public:
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typedef const unsigned* iterator;
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typedef const unsigned* const_iterator;
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unsigned ID;
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const unsigned ID;
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const char *Name;
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const unsigned RegSize, Alignment; // Size & Alignment of register in bytes
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const int CopyCost;
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const bool Allocatable;
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const iterator RegsBegin;
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unsigned RegsSize;
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const unsigned char *const RegSet;
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const unsigned RegsSize;
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const unsigned RegSetSize;
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/// getID() - Return the register class ID number.
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@ -391,8 +391,8 @@ RegisterInfoEmitter::runMCDesc(raw_ostream &OS, CodeGenTarget &Target,
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<< RC.SpillAlignment/8 << ", "
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<< RC.CopyCost << ", "
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<< RC.Allocatable << ", "
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<< RC.getName() << ", " << RC.getOrder().size() << ", "
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<< RC.getName() << "Bits, sizeof(" << RC.getName() << "Bits) },\n";
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<< RC.getName() << ", " << RC.getName() << "Bits, "
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<< RC.getOrder().size() << ", sizeof(" << RC.getName() << "Bits) },\n";
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}
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OS << "};\n\n";
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