forked from OSchip/llvm-project
[X86][SSE] Added extra memory folding tests for cvtsd2ss intrinsic
SSE only fold partial reg update instructions when optsize is enabled llvm-svn: 276743
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@ -293,6 +293,24 @@ define <4 x float> @test_x86_sse2_cvtsd2ss_load(<4 x float> %a0, <2 x double>* %
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}
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define <4 x float> @test_x86_sse2_cvtsd2ss_load_optsize(<4 x float> %a0, <2 x double>* %p1) optsize {
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; SSE-LABEL: test_x86_sse2_cvtsd2ss_load_optsize:
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; SSE: ## BB#0:
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; SSE-NEXT: movl {{[0-9]+}}(%esp), %eax
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; SSE-NEXT: cvtsd2ss (%eax), %xmm0
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; SSE-NEXT: retl
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;
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; KNL-LABEL: test_x86_sse2_cvtsd2ss_load_optsize:
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; KNL: ## BB#0:
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; KNL-NEXT: movl {{[0-9]+}}(%esp), %eax
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; KNL-NEXT: vcvtsd2ss (%eax), %xmm0, %xmm0
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; KNL-NEXT: retl
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%a1 = load <2 x double>, <2 x double>* %p1
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%res = call <4 x float> @llvm.x86.sse2.cvtsd2ss(<4 x float> %a0, <2 x double> %a1) ; <<4 x float>> [#uses=1]
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ret <4 x float> %res
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}
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define <2 x double> @test_x86_sse2_cvtsi2sd(<2 x double> %a0, i32 %a1) {
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; SSE-LABEL: test_x86_sse2_cvtsi2sd:
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; SSE: ## BB#0:
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@ -344,6 +362,24 @@ define <2 x double> @test_x86_sse2_cvtss2sd_load(<2 x double> %a0, <4 x float>*
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}
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define <2 x double> @test_x86_sse2_cvtss2sd_load_optsize(<2 x double> %a0, <4 x float>* %p1) optsize {
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; SSE-LABEL: test_x86_sse2_cvtss2sd_load_optsize:
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; SSE: ## BB#0:
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; SSE-NEXT: movl {{[0-9]+}}(%esp), %eax
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; SSE-NEXT: cvtss2sd (%eax), %xmm0
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; SSE-NEXT: retl
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;
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; KNL-LABEL: test_x86_sse2_cvtss2sd_load_optsize:
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; KNL: ## BB#0:
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; KNL-NEXT: movl {{[0-9]+}}(%esp), %eax
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; KNL-NEXT: vcvtss2sd (%eax), %xmm0, %xmm0
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; KNL-NEXT: retl
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%a1 = load <4 x float>, <4 x float>* %p1
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%res = call <2 x double> @llvm.x86.sse2.cvtss2sd(<2 x double> %a0, <4 x float> %a1) ; <<2 x double>> [#uses=1]
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ret <2 x double> %res
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}
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define <4 x i32> @test_x86_sse2_cvttpd2dq(<2 x double> %a0) {
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; SSE-LABEL: test_x86_sse2_cvttpd2dq:
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; SSE: ## BB#0:
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