forked from OSchip/llvm-project
[CostModel][X86] Fixed AVX1/AVX512 sdiv/udiv general costs for 256/512 bit integer vectors
We weren't accounting for legal types on every subtarget, meaning that many of the costs were using defaults. We still don't correctly cost (or test) the 512-bit sdiv/udiv by uniform const cases, nor the power-of-2 cases. llvm-svn: 284744
This commit is contained in:
Simon Pilgrim
parent
e55fd41f73
commit
025e26dd32
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@ -156,6 +156,25 @@ int X86TTIImpl::getArithmeticInstrCost(
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return LT.first * Entry->Cost;
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}
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static const CostTblEntry AVX512BWCostTable[] = {
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// Vectorizing division is a bad idea. See the SSE2 table for more comments.
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{ ISD::SDIV, MVT::v64i8, 64*20 },
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{ ISD::SDIV, MVT::v32i16, 32*20 },
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{ ISD::SDIV, MVT::v16i32, 16*20 },
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{ ISD::SDIV, MVT::v8i64, 8*20 },
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{ ISD::UDIV, MVT::v64i8, 64*20 },
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{ ISD::UDIV, MVT::v32i16, 32*20 },
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{ ISD::UDIV, MVT::v16i32, 16*20 },
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{ ISD::UDIV, MVT::v8i64, 8*20 },
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};
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// Look for AVX512BW lowering tricks for custom cases.
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if (ST->hasBWI()) {
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if (const auto *Entry = CostTableLookup(AVX512BWCostTable, ISD,
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LT.second))
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return LT.first * Entry->Cost;
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}
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static const CostTblEntry AVX512CostTable[] = {
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{ ISD::SHL, MVT::v16i32, 1 },
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{ ISD::SRL, MVT::v16i32, 1 },
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@ -244,7 +263,16 @@ int X86TTIImpl::getArithmeticInstrCost(
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{ ISD::SRA, MVT::v16i16, 10 }, // extend/vpsravd/pack sequence.
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{ ISD::SRA, MVT::v2i64, 4 }, // srl/xor/sub sequence.
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{ ISD::SRA, MVT::v4i64, 4 }, // srl/xor/sub sequence.
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};
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// Look for AVX2 lowering tricks for custom cases.
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if (ST->hasAVX2()) {
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if (const auto *Entry = CostTableLookup(AVX2CustomCostTable, ISD,
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LT.second))
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return LT.first * Entry->Cost;
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}
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static const CostTblEntry AVXCustomCostTable[] = {
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// Vectorizing division is a bad idea. See the SSE2 table for more comments.
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{ ISD::SDIV, MVT::v32i8, 32*20 },
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{ ISD::SDIV, MVT::v16i16, 16*20 },
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@ -257,8 +285,8 @@ int X86TTIImpl::getArithmeticInstrCost(
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};
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// Look for AVX2 lowering tricks for custom cases.
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if (ST->hasAVX2()) {
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if (const auto *Entry = CostTableLookup(AVX2CustomCostTable, ISD,
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if (ST->hasAVX()) {
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if (const auto *Entry = CostTableLookup(AVXCustomCostTable, ISD,
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LT.second))
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return LT.first * Entry->Cost;
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}
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@ -14,75 +14,49 @@ define i32 @sdiv() {
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; CHECK: cost of 1 {{.*}} %I64 = sdiv
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%I64 = sdiv i64 undef, undef
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; SSE: cost of 40 {{.*}} %V2i64 = sdiv
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; AVX1: cost of 40 {{.*}} %V2i64 = sdiv
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; AVX2: cost of 40 {{.*}} %V2i64 = sdiv
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; AVX512: cost of 40 {{.*}} %V2i64 = sdiv
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; AVX: cost of 40 {{.*}} %V2i64 = sdiv
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%V2i64 = sdiv <2 x i64> undef, undef
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; SSE: cost of 80 {{.*}} %V4i64 = sdiv
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; AVX1: cost of 12 {{.*}} %V4i64 = sdiv
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; AVX2: cost of 80 {{.*}} %V4i64 = sdiv
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; AVX512: cost of 80 {{.*}} %V4i64 = sdiv
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; AVX: cost of 80 {{.*}} %V4i64 = sdiv
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%V4i64 = sdiv <4 x i64> undef, undef
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; SSE: cost of 160 {{.*}} %V8i64 = sdiv
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; AVX1: cost of 24 {{.*}} %V8i64 = sdiv
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; AVX2: cost of 160 {{.*}} %V8i64 = sdiv
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; AVX512: cost of 24 {{.*}} %V8i64 = sdiv
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; AVX: cost of 160 {{.*}} %V8i64 = sdiv
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%V8i64 = sdiv <8 x i64> undef, undef
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; CHECK: cost of 1 {{.*}} %I32 = sdiv
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%I32 = sdiv i32 undef, undef
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; SSE: cost of 80 {{.*}} %V4i32 = sdiv
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; AVX1: cost of 80 {{.*}} %V4i32 = sdiv
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; AVX2: cost of 80 {{.*}} %V4i32 = sdiv
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; AVX512: cost of 80 {{.*}} %V4i32 = sdiv
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; AVX: cost of 80 {{.*}} %V4i32 = sdiv
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%V4i32 = sdiv <4 x i32> undef, undef
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; SSE: cost of 160 {{.*}} %V8i32 = sdiv
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; AVX1: cost of 24 {{.*}} %V8i32 = sdiv
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; AVX2: cost of 160 {{.*}} %V8i32 = sdiv
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; AVX512: cost of 160 {{.*}} %V8i32 = sdiv
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; AVX: cost of 160 {{.*}} %V8i32 = sdiv
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%V8i32 = sdiv <8 x i32> undef, undef
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; SSE: cost of 320 {{.*}} %V16i32 = sdiv
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; AVX1: cost of 48 {{.*}} %V16i32 = sdiv
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; AVX2: cost of 320 {{.*}} %V16i32 = sdiv
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; AVX512: cost of 48 {{.*}} %V16i32 = sdiv
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; AVX: cost of 320 {{.*}} %V16i32 = sdiv
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%V16i32 = sdiv <16 x i32> undef, undef
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; CHECK: cost of 1 {{.*}} %I16 = sdiv
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%I16 = sdiv i16 undef, undef
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; SSE: cost of 160 {{.*}} %V8i16 = sdiv
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; AVX1: cost of 160 {{.*}} %V8i16 = sdiv
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; AVX2: cost of 160 {{.*}} %V8i16 = sdiv
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; AVX512: cost of 160 {{.*}} %V8i16 = sdiv
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; AVX: cost of 160 {{.*}} %V8i16 = sdiv
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%V8i16 = sdiv <8 x i16> undef, undef
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; SSE: cost of 320 {{.*}} %V16i16 = sdiv
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; AVX1: cost of 48 {{.*}} %V16i16 = sdiv
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; AVX2: cost of 320 {{.*}} %V16i16 = sdiv
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; AVX512: cost of 320 {{.*}} %V16i16 = sdiv
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; AVX: cost of 320 {{.*}} %V16i16 = sdiv
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%V16i16 = sdiv <16 x i16> undef, undef
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; SSE: cost of 640 {{.*}} %V32i16 = sdiv
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; AVX1: cost of 96 {{.*}} %V32i16 = sdiv
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; AVX2: cost of 640 {{.*}} %V32i16 = sdiv
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; AVX512F: cost of 640 {{.*}} %V32i16 = sdiv
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; AVX512BW: cost of 96 {{.*}} %V32i16 = sdiv
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; AVX: cost of 640 {{.*}} %V32i16 = sdiv
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%V32i16 = sdiv <32 x i16> undef, undef
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; CHECK: cost of 1 {{.*}} %I8 = sdiv
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%I8 = sdiv i8 undef, undef
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; SSE: cost of 320 {{.*}} %V16i8 = sdiv
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; AVX1: cost of 320 {{.*}} %V16i8 = sdiv
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; AVX2: cost of 320 {{.*}} %V16i8 = sdiv
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; AVX512: cost of 320 {{.*}} %V16i8 = sdiv
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; AVX: cost of 320 {{.*}} %V16i8 = sdiv
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%V16i8 = sdiv <16 x i8> undef, undef
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; SSE: cost of 640 {{.*}} %V32i8 = sdiv
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; AVX1: cost of 96 {{.*}} %V32i8 = sdiv
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; AVX2: cost of 640 {{.*}} %V32i8 = sdiv
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; AVX512: cost of 640 {{.*}} %V32i8 = sdiv
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; AVX: cost of 640 {{.*}} %V32i8 = sdiv
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%V32i8 = sdiv <32 x i8> undef, undef
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; SSE: cost of 1280 {{.*}} %V64i8 = sdiv
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; AVX1: cost of 192 {{.*}} %V64i8 = sdiv
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; AVX2: cost of 1280 {{.*}} %V64i8 = sdiv
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; AVX512F: cost of 1280 {{.*}} %V64i8 = sdiv
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; AVX512BW: cost of 192 {{.*}} %V64i8 = sdiv
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; AVX: cost of 1280 {{.*}} %V64i8 = sdiv
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%V64i8 = sdiv <64 x i8> undef, undef
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ret i32 undef
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@ -93,75 +67,49 @@ define i32 @udiv() {
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; CHECK: cost of 1 {{.*}} %I64 = udiv
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%I64 = udiv i64 undef, undef
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; SSE: cost of 40 {{.*}} %V2i64 = udiv
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; AVX1: cost of 40 {{.*}} %V2i64 = udiv
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; AVX2: cost of 40 {{.*}} %V2i64 = udiv
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; AVX512: cost of 40 {{.*}} %V2i64 = udiv
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; AVX: cost of 40 {{.*}} %V2i64 = udiv
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%V2i64 = udiv <2 x i64> undef, undef
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; SSE: cost of 80 {{.*}} %V4i64 = udiv
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; AVX1: cost of 12 {{.*}} %V4i64 = udiv
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; AVX2: cost of 80 {{.*}} %V4i64 = udiv
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; AVX512: cost of 80 {{.*}} %V4i64 = udiv
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; AVX: cost of 80 {{.*}} %V4i64 = udiv
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%V4i64 = udiv <4 x i64> undef, undef
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; SSE: cost of 160 {{.*}} %V8i64 = udiv
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; AVX1: cost of 24 {{.*}} %V8i64 = udiv
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; AVX2: cost of 160 {{.*}} %V8i64 = udiv
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; AVX512: cost of 24 {{.*}} %V8i64 = udiv
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; AVX: cost of 160 {{.*}} %V8i64 = udiv
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%V8i64 = udiv <8 x i64> undef, undef
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; CHECK: cost of 1 {{.*}} %I32 = udiv
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%I32 = udiv i32 undef, undef
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; SSE: cost of 80 {{.*}} %V4i32 = udiv
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; AVX1: cost of 80 {{.*}} %V4i32 = udiv
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; AVX2: cost of 80 {{.*}} %V4i32 = udiv
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; AVX512: cost of 80 {{.*}} %V4i32 = udiv
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; AVX: cost of 80 {{.*}} %V4i32 = udiv
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%V4i32 = udiv <4 x i32> undef, undef
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; SSE: cost of 160 {{.*}} %V8i32 = udiv
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; AVX1: cost of 24 {{.*}} %V8i32 = udiv
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; AVX2: cost of 160 {{.*}} %V8i32 = udiv
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; AVX512: cost of 160 {{.*}} %V8i32 = udiv
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; AVX: cost of 160 {{.*}} %V8i32 = udiv
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%V8i32 = udiv <8 x i32> undef, undef
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; SSE: cost of 320 {{.*}} %V16i32 = udiv
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; AVX1: cost of 48 {{.*}} %V16i32 = udiv
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; AVX2: cost of 320 {{.*}} %V16i32 = udiv
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; AVX512: cost of 48 {{.*}} %V16i32 = udiv
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; AVX: cost of 320 {{.*}} %V16i32 = udiv
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%V16i32 = udiv <16 x i32> undef, undef
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; CHECK: cost of 1 {{.*}} %I16 = udiv
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%I16 = udiv i16 undef, undef
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; SSE: cost of 160 {{.*}} %V8i16 = udiv
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; AVX1: cost of 160 {{.*}} %V8i16 = udiv
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; AVX2: cost of 160 {{.*}} %V8i16 = udiv
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; AVX512: cost of 160 {{.*}} %V8i16 = udiv
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; AVX: cost of 160 {{.*}} %V8i16 = udiv
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%V8i16 = udiv <8 x i16> undef, undef
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; SSE: cost of 320 {{.*}} %V16i16 = udiv
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; AVX1: cost of 48 {{.*}} %V16i16 = udiv
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; AVX2: cost of 320 {{.*}} %V16i16 = udiv
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; AVX512: cost of 320 {{.*}} %V16i16 = udiv
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; AVX: cost of 320 {{.*}} %V16i16 = udiv
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%V16i16 = udiv <16 x i16> undef, undef
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; SSE: cost of 640 {{.*}} %V32i16 = udiv
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; AVX1: cost of 96 {{.*}} %V32i16 = udiv
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; AVX2: cost of 640 {{.*}} %V32i16 = udiv
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; AVX512F: cost of 640 {{.*}} %V32i16 = udiv
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; AVX512BW: cost of 96 {{.*}} %V32i16 = udiv
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; AVX: cost of 640 {{.*}} %V32i16 = udiv
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%V32i16 = udiv <32 x i16> undef, undef
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; CHECK: cost of 1 {{.*}} %I8 = udiv
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%I8 = udiv i8 undef, undef
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; SSE: cost of 320 {{.*}} %V16i8 = udiv
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; AVX1: cost of 320 {{.*}} %V16i8 = udiv
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; AVX2: cost of 320 {{.*}} %V16i8 = udiv
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; AVX512: cost of 320 {{.*}} %V16i8 = udiv
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; AVX: cost of 320 {{.*}} %V16i8 = udiv
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%V16i8 = udiv <16 x i8> undef, undef
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; SSE: cost of 640 {{.*}} %V32i8 = udiv
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; AVX1: cost of 96 {{.*}} %V32i8 = udiv
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; AVX2: cost of 640 {{.*}} %V32i8 = udiv
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; AVX512: cost of 640 {{.*}} %V32i8 = udiv
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; AVX: cost of 640 {{.*}} %V32i8 = udiv
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%V32i8 = udiv <32 x i8> undef, undef
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; SSE: cost of 1280 {{.*}} %V64i8 = udiv
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; AVX1: cost of 192 {{.*}} %V64i8 = udiv
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; AVX2: cost of 1280 {{.*}} %V64i8 = udiv
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; AVX512F: cost of 1280 {{.*}} %V64i8 = udiv
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; AVX512BW: cost of 192 {{.*}} %V64i8 = udiv
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; AVX: cost of 1280 {{.*}} %V64i8 = udiv
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%V64i8 = udiv <64 x i8> undef, undef
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ret i32 undef
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