From 023c678a0dcd7f60b79c047b4e03367bb59cdb48 Mon Sep 17 00:00:00 2001 From: Akira Hatanaka Date: Tue, 2 Apr 2013 23:02:07 +0000 Subject: [PATCH] [mips] Small update to the implementation of eh.return for Mips. This patch initializes t9 to the handler address, but only if the relocation model is pic. This handles the case where handler to which eh.return jumps points to the start of the function. Patch by Sasa Stankovic. llvm-svn: 178588 --- llvm/lib/Target/Mips/MipsSEInstrInfo.cpp | 4 ++++ llvm/test/CodeGen/Mips/eh-return32.ll | 4 ++++ llvm/test/CodeGen/Mips/eh-return64.ll | 4 ++++ 3 files changed, 12 insertions(+) diff --git a/llvm/lib/Target/Mips/MipsSEInstrInfo.cpp b/llvm/lib/Target/Mips/MipsSEInstrInfo.cpp index 9d0817208182..ca0315ed9f6e 100644 --- a/llvm/lib/Target/Mips/MipsSEInstrInfo.cpp +++ b/llvm/lib/Target/Mips/MipsSEInstrInfo.cpp @@ -387,6 +387,7 @@ void MipsSEInstrInfo::ExpandEhReturn(MachineBasicBlock &MBB, unsigned JR = STI.isABI_N64() ? Mips::JR64 : Mips::JR; unsigned SP = STI.isABI_N64() ? Mips::SP_64 : Mips::SP; unsigned RA = STI.isABI_N64() ? Mips::RA_64 : Mips::RA; + unsigned T9 = STI.isABI_N64() ? Mips::T9_64 : Mips::T9; unsigned ZERO = STI.isABI_N64() ? Mips::ZERO_64 : Mips::ZERO; unsigned OffsetReg = I->getOperand(0).getReg(); unsigned TargetReg = I->getOperand(1).getReg(); @@ -394,6 +395,9 @@ void MipsSEInstrInfo::ExpandEhReturn(MachineBasicBlock &MBB, // or $ra, $v0, $zero // addu $sp, $sp, $v1 // jr $ra + if (TM.getRelocationModel() == Reloc::PIC_) + BuildMI(MBB, I, I->getDebugLoc(), TM.getInstrInfo()->get(OR), T9) + .addReg(TargetReg).addReg(ZERO); BuildMI(MBB, I, I->getDebugLoc(), TM.getInstrInfo()->get(OR), RA) .addReg(TargetReg).addReg(ZERO); BuildMI(MBB, I, I->getDebugLoc(), TM.getInstrInfo()->get(ADDU), SP) diff --git a/llvm/test/CodeGen/Mips/eh-return32.ll b/llvm/test/CodeGen/Mips/eh-return32.ll index fe8a40475c2d..c3003b34b162 100644 --- a/llvm/test/CodeGen/Mips/eh-return32.ll +++ b/llvm/test/CodeGen/Mips/eh-return32.ll @@ -37,7 +37,9 @@ entry: ; CHECK: lw $7, [[offset3]]($sp) ; check that stack is adjusted by $v1 and that code returns to address in $v0 +; also check that $25 contains handler value ; CHECK: addiu $sp, $sp, [[spoffset]] +; CHECK: move $25, $2 ; CHECK: move $ra, $2 ; CHECK: jr $ra ; CHECK: addu $sp, $sp, $3 @@ -74,7 +76,9 @@ entry: ; CHECK: lw $7, [[offset3]]($sp) ; check that stack is adjusted by $v1 and that code returns to address in $v0 +; also check that $25 contains handler value ; CHECK: addiu $sp, $sp, [[spoffset]] +; CHECK: move $25, $2 ; CHECK: move $ra, $2 ; CHECK: jr $ra ; CHECK: addu $sp, $sp, $3 diff --git a/llvm/test/CodeGen/Mips/eh-return64.ll b/llvm/test/CodeGen/Mips/eh-return64.ll index 0b76b95e24c7..373a9a114453 100644 --- a/llvm/test/CodeGen/Mips/eh-return64.ll +++ b/llvm/test/CodeGen/Mips/eh-return64.ll @@ -37,7 +37,9 @@ entry: ; CHECK: ld $7, [[offset3]]($sp) ; check that stack is adjusted by $v1 and that code returns to address in $v0 +; also check that $25 contains handler value ; CHECK: daddiu $sp, $sp, [[spoffset]] +; CHECK: move $25, $2 ; CHECK: move $ra, $2 ; CHECK: jr $ra ; CHECK: daddu $sp, $sp, $3 @@ -75,7 +77,9 @@ entry: ; CHECK: ld $7, [[offset3]]($sp) ; check that stack is adjusted by $v1 and that code returns to address in $v0 +; also check that $25 contains handler value ; CHECK: daddiu $sp, $sp, [[spoffset]] +; CHECK: move $25, $2 ; CHECK: move $ra, $2 ; CHECK: jr $ra ; CHECK: daddu $sp, $sp, $3