[SystemZ][NFC] Renaming of ELF specific variables.

Rename ELF specific variables, making it easier to add the XPLink
variables in future patches.

Reviewed By: abhina.sreeskantharajan, Kai

Differential Revision: https://reviews.llvm.org/D98199
This commit is contained in:
Yusra Syeda 2021-03-09 14:34:48 -05:00 committed by Kai Nacke
parent 429c6ecbb3
commit 023b5c1ed8
8 changed files with 42 additions and 42 deletions

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@ -152,7 +152,7 @@ static MCAsmInfo *createSystemZMCAsmInfo(const MCRegisterInfo &MRI,
MCAsmInfo *MAI = new SystemZMCAsmInfo(TT);
MCCFIInstruction Inst = MCCFIInstruction::cfiDefCfa(
nullptr, MRI.getDwarfRegNum(SystemZ::R15D, true),
SystemZMC::CFAOffsetFromInitialSP);
SystemZMC::ELFCFAOffsetFromInitialSP);
MAI->addInitialFrameState(Inst);
return MAI;
}

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@ -32,10 +32,10 @@ class raw_ostream;
namespace SystemZMC {
// How many bytes are in the ABI-defined, caller-allocated part of
// a stack frame.
const int64_t CallFrameSize = 160;
const int64_t ELFCallFrameSize = 160;
// The offset of the DWARF CFA from the incoming stack pointer.
const int64_t CFAOffsetFromInitialSP = CallFrameSize;
const int64_t ELFCFAOffsetFromInitialSP = ELFCallFrameSize;
// Maps of asm register numbers to LLVM register numbers, with 0 indicating
// an invalid register. In principle we could use 32-bit and 64-bit register

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@ -11,10 +11,10 @@
using namespace llvm;
const MCPhysReg SystemZ::ArgGPRs[SystemZ::NumArgGPRs] = {
const MCPhysReg SystemZ::ELFArgGPRs[SystemZ::ELFNumArgGPRs] = {
SystemZ::R2D, SystemZ::R3D, SystemZ::R4D, SystemZ::R5D, SystemZ::R6D
};
const MCPhysReg SystemZ::ArgFPRs[SystemZ::NumArgFPRs] = {
const MCPhysReg SystemZ::ELFArgFPRs[SystemZ::ELFNumArgFPRs] = {
SystemZ::F0D, SystemZ::F2D, SystemZ::F4D, SystemZ::F6D
};

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@ -15,11 +15,11 @@
namespace llvm {
namespace SystemZ {
const unsigned NumArgGPRs = 5;
extern const MCPhysReg ArgGPRs[NumArgGPRs];
const unsigned ELFNumArgGPRs = 5;
extern const MCPhysReg ELFArgGPRs[ELFNumArgGPRs];
const unsigned NumArgFPRs = 4;
extern const MCPhysReg ArgFPRs[NumArgFPRs];
const unsigned ELFNumArgFPRs = 4;
extern const MCPhysReg ELFArgFPRs[ELFNumArgFPRs];
} // end namespace SystemZ
class SystemZCCState : public CCState {
@ -107,7 +107,7 @@ inline bool CC_SystemZ_I128Indirect(unsigned &ValNo, MVT &ValVT,
// OK, we've collected all parts in the pending list. Allocate
// the location (register or stack slot) for the indirect pointer.
// (This duplicates the usual i64 calling convention rules.)
unsigned Reg = State.AllocateReg(SystemZ::ArgGPRs);
unsigned Reg = State.AllocateReg(SystemZ::ELFArgGPRs);
unsigned Offset = Reg ? 0 : State.AllocateStack(8, Align(8));
// Use that same location for all the pending parts.

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@ -23,7 +23,7 @@ using namespace llvm;
namespace {
// The ABI-defined register save slots, relative to the CFA (i.e.
// incoming stack pointer + SystemZMC::CallFrameSize).
// incoming stack pointer + SystemZMC::ELFCallFrameSize).
static const TargetFrameLowering::SpillSlot SpillOffsetTable[] = {
{ SystemZ::R2D, 0x10 },
{ SystemZ::R3D, 0x18 },
@ -75,7 +75,7 @@ assignCalleeSavedSpillSlots(MachineFunction &MF,
unsigned LowGPR = 0;
unsigned HighGPR = SystemZ::R15D;
int StartSPOffset = SystemZMC::CallFrameSize;
int StartSPOffset = SystemZMC::ELFCallFrameSize;
for (auto &CS : CSI) {
unsigned Reg = CS.getReg();
int Offset = getRegSpillOffset(MF, Reg);
@ -84,7 +84,7 @@ assignCalleeSavedSpillSlots(MachineFunction &MF,
LowGPR = Reg;
StartSPOffset = Offset;
}
Offset -= SystemZMC::CallFrameSize;
Offset -= SystemZMC::ELFCallFrameSize;
int FrameIdx = MFFrame.CreateFixedSpillStackObject(8, Offset);
CS.setFrameIdx(FrameIdx);
} else
@ -99,8 +99,8 @@ assignCalleeSavedSpillSlots(MachineFunction &MF,
// already be included, but we also need to handle the call-clobbered
// argument registers.
unsigned FirstGPR = ZFI->getVarArgsFirstGPR();
if (FirstGPR < SystemZ::NumArgGPRs) {
unsigned Reg = SystemZ::ArgGPRs[FirstGPR];
if (FirstGPR < SystemZ::ELFNumArgGPRs) {
unsigned Reg = SystemZ::ELFArgGPRs[FirstGPR];
int Offset = getRegSpillOffset(MF, Reg);
if (StartSPOffset > Offset) {
LowGPR = Reg; StartSPOffset = Offset;
@ -110,7 +110,7 @@ assignCalleeSavedSpillSlots(MachineFunction &MF,
ZFI->setSpillGPRRegs(LowGPR, HighGPR, StartSPOffset);
// Create fixed stack objects for the remaining registers.
int CurrOffset = -SystemZMC::CallFrameSize;
int CurrOffset = -SystemZMC::ELFCallFrameSize;
if (usePackedStack(MF))
CurrOffset += StartSPOffset;
@ -146,8 +146,8 @@ void SystemZFrameLowering::determineCalleeSaves(MachineFunction &MF,
// Record these pending uses, which typically include the call-saved
// argument register R6D.
if (IsVarArg)
for (unsigned I = MFI->getVarArgsFirstGPR(); I < SystemZ::NumArgGPRs; ++I)
SavedRegs.set(SystemZ::ArgGPRs[I]);
for (unsigned I = MFI->getVarArgsFirstGPR(); I < SystemZ::ELFNumArgGPRs; ++I)
SavedRegs.set(SystemZ::ELFArgGPRs[I]);
// If there are any landing pads, entering them will modify r6/r7.
if (!MF.getLandingPads().empty()) {
@ -234,8 +234,8 @@ bool SystemZFrameLowering::spillCalleeSavedRegisters(
// ...likewise GPR varargs.
if (IsVarArg)
for (unsigned I = ZFI->getVarArgsFirstGPR(); I < SystemZ::NumArgGPRs; ++I)
addSavedGPR(MBB, MIB, SystemZ::ArgGPRs[I], true);
for (unsigned I = ZFI->getVarArgsFirstGPR(); I < SystemZ::ELFNumArgGPRs; ++I)
addSavedGPR(MBB, MIB, SystemZ::ELFArgGPRs[I], true);
}
// Save FPRs/VRs in the normal TargetInstrInfo way.
@ -326,7 +326,7 @@ processFunctionBeforeFrameFinalized(MachineFunction &MF,
// Get the size of our stack frame to be allocated ...
uint64_t StackSize = (MFFrame.estimateStackSize(MF) +
SystemZMC::CallFrameSize);
SystemZMC::ELFCallFrameSize);
// ... and the maximum offset we may need to reach into the
// caller's frame to access the save area or stack arguments.
int64_t MaxArgOffset = 0;
@ -437,7 +437,7 @@ void SystemZFrameLowering::emitPrologue(MachineFunction &MF,
report_fatal_error(
"In GHC calling convention a frame pointer is not supported");
}
MFFrame.setStackSize(MFFrame.getStackSize() + SystemZMC::CallFrameSize);
MFFrame.setStackSize(MFFrame.getStackSize() + SystemZMC::ELFCallFrameSize);
return;
}
@ -446,7 +446,7 @@ void SystemZFrameLowering::emitPrologue(MachineFunction &MF,
DebugLoc DL;
// The current offset of the stack pointer from the CFA.
int64_t SPOffsetFromCFA = -SystemZMC::CFAOffsetFromInitialSP;
int64_t SPOffsetFromCFA = -SystemZMC::ELFCFAOffsetFromInitialSP;
if (ZFI->getSpillGPRRegs().LowGPR) {
// Skip over the GPR saves.
@ -480,10 +480,10 @@ void SystemZFrameLowering::emitPrologue(MachineFunction &MF,
break;
}
if (HasStackObject || MFFrame.hasCalls())
StackSize += SystemZMC::CallFrameSize;
StackSize += SystemZMC::ELFCallFrameSize;
// Don't allocate the incoming reg save area.
StackSize = StackSize > SystemZMC::CallFrameSize
? StackSize - SystemZMC::CallFrameSize
StackSize = StackSize > SystemZMC::ELFCallFrameSize
? StackSize - SystemZMC::ELFCallFrameSize
: 0;
MFFrame.setStackSize(StackSize);
@ -638,7 +638,7 @@ void SystemZFrameLowering::inlineStackProbe(MachineFunction &MF,
const unsigned ProbeSize = TLI.getStackProbeSize(MF);
uint64_t NumFullBlocks = StackSize / ProbeSize;
uint64_t Residual = StackSize % ProbeSize;
int64_t SPOffsetFromCFA = -SystemZMC::CFAOffsetFromInitialSP;
int64_t SPOffsetFromCFA = -SystemZMC::ELFCFAOffsetFromInitialSP;
MachineBasicBlock *MBB = &PrologMBB;
MachineBasicBlock::iterator MBBI = StackAllocMI;
const DebugLoc DL = StackAllocMI->getDebugLoc();
@ -682,7 +682,7 @@ void SystemZFrameLowering::inlineStackProbe(MachineFunction &MF,
.addReg(SystemZ::R15D);
buildDefCFAReg(*MBB, MBBI, DL, SystemZ::R0D, ZII);
emitIncrement(*MBB, MBBI, DL, SystemZ::R0D, -int64_t(LoopAlloc), ZII);
buildCFAOffs(*MBB, MBBI, DL, -int64_t(SystemZMC::CallFrameSize + LoopAlloc),
buildCFAOffs(*MBB, MBBI, DL, -int64_t(SystemZMC::ELFCallFrameSize + LoopAlloc),
ZII);
DoneMBB = SystemZ::splitBlockBefore(MBBI, MBB);
@ -737,11 +737,11 @@ SystemZFrameLowering::hasReservedCallFrame(const MachineFunction &MF) const {
StackOffset
SystemZFrameLowering::getFrameIndexReference(const MachineFunction &MF, int FI,
Register &FrameReg) const {
// Our incoming SP is actually SystemZMC::CallFrameSize below the CFA, so
// Our incoming SP is actually SystemZMC::ELFCallFrameSize below the CFA, so
// add that difference here.
StackOffset Offset =
TargetFrameLowering::getFrameIndexReference(MF, FI, FrameReg);
return Offset + StackOffset::getFixed(SystemZMC::CallFrameSize);
return Offset + StackOffset::getFixed(SystemZMC::ELFCallFrameSize);
}
MachineBasicBlock::iterator SystemZFrameLowering::
@ -784,7 +784,7 @@ getOrCreateFramePointerSaveIndex(MachineFunction &MF) const {
int FI = ZFI->getFramePointerSaveIndex();
if (!FI) {
MachineFrameInfo &MFFrame = MF.getFrameInfo();
int Offset = getBackchainOffset(MF) - SystemZMC::CallFrameSize;
int Offset = getBackchainOffset(MF) - SystemZMC::ELFCallFrameSize;
FI = MFFrame.CreateFixedObject(8, Offset, false);
ZFI->setFramePointerSaveIndex(FI);
}

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@ -68,7 +68,7 @@ public:
// Return the offset of the backchain.
unsigned getBackchainOffset(MachineFunction &MF) const {
// The back chain is stored topmost with packed-stack.
return usePackedStack(MF) ? SystemZMC::CallFrameSize - 8 : 0;
return usePackedStack(MF) ? SystemZMC::ELFCallFrameSize - 8 : 0;
}
};
} // end namespace llvm

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@ -1482,20 +1482,20 @@ SDValue SystemZTargetLowering::LowerFormalArguments(
// ...and a similar frame index for the caller-allocated save area
// that will be used to store the incoming registers.
int64_t RegSaveOffset =
-SystemZMC::CallFrameSize + TFL->getRegSpillOffset(MF, SystemZ::R2D) - 16;
-SystemZMC::ELFCallFrameSize + TFL->getRegSpillOffset(MF, SystemZ::R2D) - 16;
unsigned RegSaveIndex = MFI.CreateFixedObject(1, RegSaveOffset, true);
FuncInfo->setRegSaveFrameIndex(RegSaveIndex);
// Store the FPR varargs in the reserved frame slots. (We store the
// GPRs as part of the prologue.)
if (NumFixedFPRs < SystemZ::NumArgFPRs && !useSoftFloat()) {
SDValue MemOps[SystemZ::NumArgFPRs];
for (unsigned I = NumFixedFPRs; I < SystemZ::NumArgFPRs; ++I) {
unsigned Offset = TFL->getRegSpillOffset(MF, SystemZ::ArgFPRs[I]);
if (NumFixedFPRs < SystemZ::ELFNumArgFPRs && !useSoftFloat()) {
SDValue MemOps[SystemZ::ELFNumArgFPRs];
for (unsigned I = NumFixedFPRs; I < SystemZ::ELFNumArgFPRs; ++I) {
unsigned Offset = TFL->getRegSpillOffset(MF, SystemZ::ELFArgFPRs[I]);
int FI =
MFI.CreateFixedObject(8, -SystemZMC::CallFrameSize + Offset, true);
MFI.CreateFixedObject(8, -SystemZMC::ELFCallFrameSize + Offset, true);
SDValue FIN = DAG.getFrameIndex(FI, getPointerTy(DAG.getDataLayout()));
unsigned VReg = MF.addLiveIn(SystemZ::ArgFPRs[I],
unsigned VReg = MF.addLiveIn(SystemZ::ELFArgFPRs[I],
&SystemZ::FP64BitRegClass);
SDValue ArgValue = DAG.getCopyFromReg(Chain, DL, VReg, MVT::f64);
MemOps[I] = DAG.getStore(ArgValue.getValue(1), DL, ArgValue, FIN,
@ -1504,7 +1504,7 @@ SDValue SystemZTargetLowering::LowerFormalArguments(
// Join the stores, which are independent of one another.
Chain = DAG.getNode(ISD::TokenFactor, DL, MVT::Other,
makeArrayRef(&MemOps[NumFixedFPRs],
SystemZ::NumArgFPRs-NumFixedFPRs));
SystemZ::ELFNumArgFPRs-NumFixedFPRs));
}
}
@ -1628,7 +1628,7 @@ SystemZTargetLowering::LowerCall(CallLoweringInfo &CLI,
// floats are passed as right-justified 8-byte values.
if (!StackPtr.getNode())
StackPtr = DAG.getCopyFromReg(Chain, DL, SystemZ::R15D, PtrVT);
unsigned Offset = SystemZMC::CallFrameSize + VA.getLocMemOffset();
unsigned Offset = SystemZMC::ELFCallFrameSize + VA.getLocMemOffset();
if (VA.getLocVT() == MVT::i32 || VA.getLocVT() == MVT::f32)
Offset += 4;
SDValue Address = DAG.getNode(ISD::ADD, DL, PtrVT, StackPtr,

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@ -120,7 +120,7 @@ void SystemZInstrInfo::splitAdjDynAlloc(MachineBasicBlock::iterator MI) const {
MachineOperand &OffsetMO = MI->getOperand(2);
uint64_t Offset = (MFFrame.getMaxCallFrameSize() +
SystemZMC::CallFrameSize +
SystemZMC::ELFCallFrameSize +
OffsetMO.getImm());
unsigned NewOpcode = getOpcodeForOffset(SystemZ::LA, Offset);
assert(NewOpcode && "No support for huge argument lists yet");