forked from OSchip/llvm-project
[SystemZ][NFC] Renaming of ELF specific variables.
Rename ELF specific variables, making it easier to add the XPLink variables in future patches. Reviewed By: abhina.sreeskantharajan, Kai Differential Revision: https://reviews.llvm.org/D98199
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429c6ecbb3
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023b5c1ed8
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@ -152,7 +152,7 @@ static MCAsmInfo *createSystemZMCAsmInfo(const MCRegisterInfo &MRI,
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MCAsmInfo *MAI = new SystemZMCAsmInfo(TT);
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MCCFIInstruction Inst = MCCFIInstruction::cfiDefCfa(
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nullptr, MRI.getDwarfRegNum(SystemZ::R15D, true),
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SystemZMC::CFAOffsetFromInitialSP);
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SystemZMC::ELFCFAOffsetFromInitialSP);
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MAI->addInitialFrameState(Inst);
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return MAI;
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}
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@ -32,10 +32,10 @@ class raw_ostream;
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namespace SystemZMC {
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// How many bytes are in the ABI-defined, caller-allocated part of
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// a stack frame.
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const int64_t CallFrameSize = 160;
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const int64_t ELFCallFrameSize = 160;
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// The offset of the DWARF CFA from the incoming stack pointer.
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const int64_t CFAOffsetFromInitialSP = CallFrameSize;
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const int64_t ELFCFAOffsetFromInitialSP = ELFCallFrameSize;
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// Maps of asm register numbers to LLVM register numbers, with 0 indicating
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// an invalid register. In principle we could use 32-bit and 64-bit register
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@ -11,10 +11,10 @@
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using namespace llvm;
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const MCPhysReg SystemZ::ArgGPRs[SystemZ::NumArgGPRs] = {
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const MCPhysReg SystemZ::ELFArgGPRs[SystemZ::ELFNumArgGPRs] = {
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SystemZ::R2D, SystemZ::R3D, SystemZ::R4D, SystemZ::R5D, SystemZ::R6D
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};
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const MCPhysReg SystemZ::ArgFPRs[SystemZ::NumArgFPRs] = {
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const MCPhysReg SystemZ::ELFArgFPRs[SystemZ::ELFNumArgFPRs] = {
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SystemZ::F0D, SystemZ::F2D, SystemZ::F4D, SystemZ::F6D
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};
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@ -15,11 +15,11 @@
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namespace llvm {
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namespace SystemZ {
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const unsigned NumArgGPRs = 5;
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extern const MCPhysReg ArgGPRs[NumArgGPRs];
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const unsigned ELFNumArgGPRs = 5;
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extern const MCPhysReg ELFArgGPRs[ELFNumArgGPRs];
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const unsigned NumArgFPRs = 4;
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extern const MCPhysReg ArgFPRs[NumArgFPRs];
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const unsigned ELFNumArgFPRs = 4;
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extern const MCPhysReg ELFArgFPRs[ELFNumArgFPRs];
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} // end namespace SystemZ
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class SystemZCCState : public CCState {
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@ -107,7 +107,7 @@ inline bool CC_SystemZ_I128Indirect(unsigned &ValNo, MVT &ValVT,
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// OK, we've collected all parts in the pending list. Allocate
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// the location (register or stack slot) for the indirect pointer.
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// (This duplicates the usual i64 calling convention rules.)
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unsigned Reg = State.AllocateReg(SystemZ::ArgGPRs);
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unsigned Reg = State.AllocateReg(SystemZ::ELFArgGPRs);
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unsigned Offset = Reg ? 0 : State.AllocateStack(8, Align(8));
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// Use that same location for all the pending parts.
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@ -23,7 +23,7 @@ using namespace llvm;
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namespace {
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// The ABI-defined register save slots, relative to the CFA (i.e.
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// incoming stack pointer + SystemZMC::CallFrameSize).
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// incoming stack pointer + SystemZMC::ELFCallFrameSize).
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static const TargetFrameLowering::SpillSlot SpillOffsetTable[] = {
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{ SystemZ::R2D, 0x10 },
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{ SystemZ::R3D, 0x18 },
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@ -75,7 +75,7 @@ assignCalleeSavedSpillSlots(MachineFunction &MF,
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unsigned LowGPR = 0;
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unsigned HighGPR = SystemZ::R15D;
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int StartSPOffset = SystemZMC::CallFrameSize;
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int StartSPOffset = SystemZMC::ELFCallFrameSize;
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for (auto &CS : CSI) {
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unsigned Reg = CS.getReg();
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int Offset = getRegSpillOffset(MF, Reg);
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@ -84,7 +84,7 @@ assignCalleeSavedSpillSlots(MachineFunction &MF,
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LowGPR = Reg;
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StartSPOffset = Offset;
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}
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Offset -= SystemZMC::CallFrameSize;
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Offset -= SystemZMC::ELFCallFrameSize;
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int FrameIdx = MFFrame.CreateFixedSpillStackObject(8, Offset);
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CS.setFrameIdx(FrameIdx);
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} else
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@ -99,8 +99,8 @@ assignCalleeSavedSpillSlots(MachineFunction &MF,
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// already be included, but we also need to handle the call-clobbered
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// argument registers.
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unsigned FirstGPR = ZFI->getVarArgsFirstGPR();
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if (FirstGPR < SystemZ::NumArgGPRs) {
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unsigned Reg = SystemZ::ArgGPRs[FirstGPR];
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if (FirstGPR < SystemZ::ELFNumArgGPRs) {
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unsigned Reg = SystemZ::ELFArgGPRs[FirstGPR];
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int Offset = getRegSpillOffset(MF, Reg);
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if (StartSPOffset > Offset) {
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LowGPR = Reg; StartSPOffset = Offset;
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@ -110,7 +110,7 @@ assignCalleeSavedSpillSlots(MachineFunction &MF,
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ZFI->setSpillGPRRegs(LowGPR, HighGPR, StartSPOffset);
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// Create fixed stack objects for the remaining registers.
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int CurrOffset = -SystemZMC::CallFrameSize;
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int CurrOffset = -SystemZMC::ELFCallFrameSize;
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if (usePackedStack(MF))
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CurrOffset += StartSPOffset;
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@ -146,8 +146,8 @@ void SystemZFrameLowering::determineCalleeSaves(MachineFunction &MF,
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// Record these pending uses, which typically include the call-saved
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// argument register R6D.
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if (IsVarArg)
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for (unsigned I = MFI->getVarArgsFirstGPR(); I < SystemZ::NumArgGPRs; ++I)
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SavedRegs.set(SystemZ::ArgGPRs[I]);
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for (unsigned I = MFI->getVarArgsFirstGPR(); I < SystemZ::ELFNumArgGPRs; ++I)
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SavedRegs.set(SystemZ::ELFArgGPRs[I]);
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// If there are any landing pads, entering them will modify r6/r7.
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if (!MF.getLandingPads().empty()) {
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@ -234,8 +234,8 @@ bool SystemZFrameLowering::spillCalleeSavedRegisters(
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// ...likewise GPR varargs.
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if (IsVarArg)
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for (unsigned I = ZFI->getVarArgsFirstGPR(); I < SystemZ::NumArgGPRs; ++I)
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addSavedGPR(MBB, MIB, SystemZ::ArgGPRs[I], true);
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for (unsigned I = ZFI->getVarArgsFirstGPR(); I < SystemZ::ELFNumArgGPRs; ++I)
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addSavedGPR(MBB, MIB, SystemZ::ELFArgGPRs[I], true);
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}
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// Save FPRs/VRs in the normal TargetInstrInfo way.
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@ -326,7 +326,7 @@ processFunctionBeforeFrameFinalized(MachineFunction &MF,
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// Get the size of our stack frame to be allocated ...
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uint64_t StackSize = (MFFrame.estimateStackSize(MF) +
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SystemZMC::CallFrameSize);
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SystemZMC::ELFCallFrameSize);
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// ... and the maximum offset we may need to reach into the
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// caller's frame to access the save area or stack arguments.
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int64_t MaxArgOffset = 0;
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@ -437,7 +437,7 @@ void SystemZFrameLowering::emitPrologue(MachineFunction &MF,
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report_fatal_error(
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"In GHC calling convention a frame pointer is not supported");
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}
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MFFrame.setStackSize(MFFrame.getStackSize() + SystemZMC::CallFrameSize);
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MFFrame.setStackSize(MFFrame.getStackSize() + SystemZMC::ELFCallFrameSize);
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return;
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}
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@ -446,7 +446,7 @@ void SystemZFrameLowering::emitPrologue(MachineFunction &MF,
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DebugLoc DL;
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// The current offset of the stack pointer from the CFA.
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int64_t SPOffsetFromCFA = -SystemZMC::CFAOffsetFromInitialSP;
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int64_t SPOffsetFromCFA = -SystemZMC::ELFCFAOffsetFromInitialSP;
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if (ZFI->getSpillGPRRegs().LowGPR) {
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// Skip over the GPR saves.
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@ -480,10 +480,10 @@ void SystemZFrameLowering::emitPrologue(MachineFunction &MF,
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break;
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}
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if (HasStackObject || MFFrame.hasCalls())
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StackSize += SystemZMC::CallFrameSize;
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StackSize += SystemZMC::ELFCallFrameSize;
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// Don't allocate the incoming reg save area.
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StackSize = StackSize > SystemZMC::CallFrameSize
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? StackSize - SystemZMC::CallFrameSize
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StackSize = StackSize > SystemZMC::ELFCallFrameSize
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? StackSize - SystemZMC::ELFCallFrameSize
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: 0;
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MFFrame.setStackSize(StackSize);
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@ -638,7 +638,7 @@ void SystemZFrameLowering::inlineStackProbe(MachineFunction &MF,
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const unsigned ProbeSize = TLI.getStackProbeSize(MF);
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uint64_t NumFullBlocks = StackSize / ProbeSize;
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uint64_t Residual = StackSize % ProbeSize;
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int64_t SPOffsetFromCFA = -SystemZMC::CFAOffsetFromInitialSP;
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int64_t SPOffsetFromCFA = -SystemZMC::ELFCFAOffsetFromInitialSP;
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MachineBasicBlock *MBB = &PrologMBB;
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MachineBasicBlock::iterator MBBI = StackAllocMI;
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const DebugLoc DL = StackAllocMI->getDebugLoc();
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@ -682,7 +682,7 @@ void SystemZFrameLowering::inlineStackProbe(MachineFunction &MF,
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.addReg(SystemZ::R15D);
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buildDefCFAReg(*MBB, MBBI, DL, SystemZ::R0D, ZII);
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emitIncrement(*MBB, MBBI, DL, SystemZ::R0D, -int64_t(LoopAlloc), ZII);
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buildCFAOffs(*MBB, MBBI, DL, -int64_t(SystemZMC::CallFrameSize + LoopAlloc),
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buildCFAOffs(*MBB, MBBI, DL, -int64_t(SystemZMC::ELFCallFrameSize + LoopAlloc),
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ZII);
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DoneMBB = SystemZ::splitBlockBefore(MBBI, MBB);
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@ -737,11 +737,11 @@ SystemZFrameLowering::hasReservedCallFrame(const MachineFunction &MF) const {
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StackOffset
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SystemZFrameLowering::getFrameIndexReference(const MachineFunction &MF, int FI,
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Register &FrameReg) const {
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// Our incoming SP is actually SystemZMC::CallFrameSize below the CFA, so
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// Our incoming SP is actually SystemZMC::ELFCallFrameSize below the CFA, so
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// add that difference here.
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StackOffset Offset =
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TargetFrameLowering::getFrameIndexReference(MF, FI, FrameReg);
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return Offset + StackOffset::getFixed(SystemZMC::CallFrameSize);
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return Offset + StackOffset::getFixed(SystemZMC::ELFCallFrameSize);
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}
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MachineBasicBlock::iterator SystemZFrameLowering::
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@ -784,7 +784,7 @@ getOrCreateFramePointerSaveIndex(MachineFunction &MF) const {
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int FI = ZFI->getFramePointerSaveIndex();
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if (!FI) {
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MachineFrameInfo &MFFrame = MF.getFrameInfo();
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int Offset = getBackchainOffset(MF) - SystemZMC::CallFrameSize;
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int Offset = getBackchainOffset(MF) - SystemZMC::ELFCallFrameSize;
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FI = MFFrame.CreateFixedObject(8, Offset, false);
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ZFI->setFramePointerSaveIndex(FI);
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}
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@ -68,7 +68,7 @@ public:
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// Return the offset of the backchain.
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unsigned getBackchainOffset(MachineFunction &MF) const {
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// The back chain is stored topmost with packed-stack.
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return usePackedStack(MF) ? SystemZMC::CallFrameSize - 8 : 0;
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return usePackedStack(MF) ? SystemZMC::ELFCallFrameSize - 8 : 0;
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}
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};
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} // end namespace llvm
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@ -1482,20 +1482,20 @@ SDValue SystemZTargetLowering::LowerFormalArguments(
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// ...and a similar frame index for the caller-allocated save area
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// that will be used to store the incoming registers.
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int64_t RegSaveOffset =
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-SystemZMC::CallFrameSize + TFL->getRegSpillOffset(MF, SystemZ::R2D) - 16;
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-SystemZMC::ELFCallFrameSize + TFL->getRegSpillOffset(MF, SystemZ::R2D) - 16;
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unsigned RegSaveIndex = MFI.CreateFixedObject(1, RegSaveOffset, true);
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FuncInfo->setRegSaveFrameIndex(RegSaveIndex);
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// Store the FPR varargs in the reserved frame slots. (We store the
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// GPRs as part of the prologue.)
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if (NumFixedFPRs < SystemZ::NumArgFPRs && !useSoftFloat()) {
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SDValue MemOps[SystemZ::NumArgFPRs];
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for (unsigned I = NumFixedFPRs; I < SystemZ::NumArgFPRs; ++I) {
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unsigned Offset = TFL->getRegSpillOffset(MF, SystemZ::ArgFPRs[I]);
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if (NumFixedFPRs < SystemZ::ELFNumArgFPRs && !useSoftFloat()) {
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SDValue MemOps[SystemZ::ELFNumArgFPRs];
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for (unsigned I = NumFixedFPRs; I < SystemZ::ELFNumArgFPRs; ++I) {
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unsigned Offset = TFL->getRegSpillOffset(MF, SystemZ::ELFArgFPRs[I]);
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int FI =
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MFI.CreateFixedObject(8, -SystemZMC::CallFrameSize + Offset, true);
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MFI.CreateFixedObject(8, -SystemZMC::ELFCallFrameSize + Offset, true);
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SDValue FIN = DAG.getFrameIndex(FI, getPointerTy(DAG.getDataLayout()));
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unsigned VReg = MF.addLiveIn(SystemZ::ArgFPRs[I],
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unsigned VReg = MF.addLiveIn(SystemZ::ELFArgFPRs[I],
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&SystemZ::FP64BitRegClass);
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SDValue ArgValue = DAG.getCopyFromReg(Chain, DL, VReg, MVT::f64);
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MemOps[I] = DAG.getStore(ArgValue.getValue(1), DL, ArgValue, FIN,
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// Join the stores, which are independent of one another.
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Chain = DAG.getNode(ISD::TokenFactor, DL, MVT::Other,
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makeArrayRef(&MemOps[NumFixedFPRs],
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SystemZ::NumArgFPRs-NumFixedFPRs));
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SystemZ::ELFNumArgFPRs-NumFixedFPRs));
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}
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}
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// floats are passed as right-justified 8-byte values.
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if (!StackPtr.getNode())
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StackPtr = DAG.getCopyFromReg(Chain, DL, SystemZ::R15D, PtrVT);
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unsigned Offset = SystemZMC::CallFrameSize + VA.getLocMemOffset();
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unsigned Offset = SystemZMC::ELFCallFrameSize + VA.getLocMemOffset();
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if (VA.getLocVT() == MVT::i32 || VA.getLocVT() == MVT::f32)
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Offset += 4;
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SDValue Address = DAG.getNode(ISD::ADD, DL, PtrVT, StackPtr,
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@ -120,7 +120,7 @@ void SystemZInstrInfo::splitAdjDynAlloc(MachineBasicBlock::iterator MI) const {
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MachineOperand &OffsetMO = MI->getOperand(2);
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uint64_t Offset = (MFFrame.getMaxCallFrameSize() +
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SystemZMC::CallFrameSize +
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SystemZMC::ELFCallFrameSize +
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OffsetMO.getImm());
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unsigned NewOpcode = getOpcodeForOffset(SystemZ::LA, Offset);
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assert(NewOpcode && "No support for huge argument lists yet");
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