forked from OSchip/llvm-project
Fold some more [mem] op= val operators. This allows us to things like this
several times in 256.bzip2: mov %EAX, DWORD PTR [%ESP + 204] - mov %EAX, DWORD PTR [%EAX] - or %EAX, 2097152 - mov %ECX, DWORD PTR [%ESP + 204] - mov DWORD PTR [%ECX], %EAX + or DWORD PTR [%EAX], 2097152 llvm-svn: 19492
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@ -2129,11 +2129,46 @@ void ISel::Select(SDOperand N) {
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X86::ADD8mi, X86::ADD16mi, X86::ADD32mi,
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X86::ADD8mr, X86::ADD16mr, X86::ADD32mr, 0, 0,
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};
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static const unsigned SUBTAB[] = {
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X86::SUB8mi, X86::SUB16mi, X86::SUB32mi,
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X86::SUB8mr, X86::SUB16mr, X86::SUB32mr, 0, 0,
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};
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static const unsigned ANDTAB[] = {
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X86::AND8mi, X86::AND16mi, X86::AND32mi,
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X86::AND8mr, X86::AND16mr, X86::AND32mr, 0, 0,
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};
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static const unsigned ORTAB[] = {
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X86::OR8mi, X86::OR16mi, X86::OR32mi,
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X86::OR8mr, X86::OR16mr, X86::OR32mr, 0, 0,
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};
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static const unsigned XORTAB[] = {
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X86::XOR8mi, X86::XOR16mi, X86::XOR32mi,
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X86::XOR8mr, X86::XOR16mr, X86::XOR32mr, 0, 0,
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};
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static const unsigned SHLTAB[] = {
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X86::SHL8mi, X86::SHL16mi, X86::SHL32mi,
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/*Have to put the reg in CL*/0, 0, 0, 0, 0,
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};
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static const unsigned SARTAB[] = {
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X86::SAR8mi, X86::SAR16mi, X86::SAR32mi,
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/*Have to put the reg in CL*/0, 0, 0, 0, 0,
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};
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static const unsigned SHRTAB[] = {
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X86::SHR8mi, X86::SHR16mi, X86::SHR32mi,
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/*Have to put the reg in CL*/0, 0, 0, 0, 0,
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};
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const unsigned *TabPtr = 0;
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switch (Op.getOpcode()) {
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default: break;
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default: std::cerr << "CANNOT [mem] op= val: "; Op.Val->dump(); std::cerr << "\n"; break;
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case ISD::ADD: TabPtr = ADDTAB; break;
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case ISD::SUB: TabPtr = SUBTAB; break;
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case ISD::AND: TabPtr = ANDTAB; break;
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case ISD:: OR: TabPtr = ORTAB; break;
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case ISD::XOR: TabPtr = XORTAB; break;
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case ISD::SHL: TabPtr = SHLTAB; break;
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case ISD::SRA: TabPtr = SARTAB; break;
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case ISD::SRL: TabPtr = SHRTAB; break;
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}
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if (TabPtr) {
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@ -2166,7 +2201,9 @@ void ISel::Select(SDOperand N) {
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// If we have [mem] = V op [mem], try to turn it into:
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// [mem] = [mem] op V.
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if (Op1 == TheLoad && 1 /*iscommutative*/)
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if (Op1 == TheLoad && Op.getOpcode() != ISD::SUB &&
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Op.getOpcode() != ISD::SHL && Op.getOpcode() != ISD::SRA &&
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Op.getOpcode() != ISD::SRL)
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std::swap(Op0, Op1);
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if (Op0 == TheLoad) {
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