Migrate the HexagonSplitConst32AndConst64 pass from TargetMachine

based getSubtarget to the one cached on the MachineFunction.
Remove unused class variables and update all callers/uses.

llvm-svn: 227874
This commit is contained in:
Eric Christopher 2015-02-02 22:11:43 +00:00
parent 0fef34e3fc
commit 01f875e859
3 changed files with 10 additions and 17 deletions

View File

@ -37,8 +37,7 @@ namespace llvm {
FunctionPass *createHexagonCFGOptimizer();
FunctionPass *createHexagonSplitTFRCondSets(const HexagonTargetMachine &TM);
FunctionPass *createHexagonSplitConst32AndConst64(
const HexagonTargetMachine &TM);
FunctionPass *createHexagonSplitConst32AndConst64();
FunctionPass *createHexagonExpandPredSpillCode();
FunctionPass *createHexagonHardwareLoops();
FunctionPass *createHexagonPeephole();

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@ -48,12 +48,9 @@ using namespace llvm;
namespace {
class HexagonSplitConst32AndConst64 : public MachineFunctionPass {
const HexagonTargetMachine &QTM;
public:
static char ID;
HexagonSplitConst32AndConst64(const HexagonTargetMachine &TM)
: MachineFunctionPass(ID), QTM(TM) {}
HexagonSplitConst32AndConst64() : MachineFunctionPass(ID) {}
const char *getPassName() const override {
return "Hexagon Split Const32s and Const64s";
@ -68,13 +65,12 @@ char HexagonSplitConst32AndConst64::ID = 0;
bool HexagonSplitConst32AndConst64::runOnMachineFunction(MachineFunction &Fn) {
const HexagonTargetObjectFile &TLOF =
(const HexagonTargetObjectFile &)QTM.getSubtargetImpl()
->getTargetLowering()
->getObjFileLowering();
*static_cast<const HexagonTargetObjectFile *>(
Fn.getTarget().getObjFileLowering());
if (TLOF.IsSmallDataEnabled())
return true;
const TargetInstrInfo *TII = QTM.getSubtargetImpl()->getInstrInfo();
const TargetInstrInfo *TII = Fn.getSubtarget().getInstrInfo();
// Loop over all of the basic blocks
for (MachineFunction::iterator MBBb = Fn.begin(), MBBe = Fn.end();
@ -139,9 +135,9 @@ bool HexagonSplitConst32AndConst64::runOnMachineFunction(MachineFunction &Fn) {
else if (Opc == Hexagon::CONST64_Int_Real) {
int DestReg = MI->getOperand(0).getReg();
int64_t ImmValue = MI->getOperand(1).getImm ();
unsigned DestLo = QTM.getSubtargetImpl()->getRegisterInfo()->getSubReg(
unsigned DestLo = Fn.getSubtarget().getRegisterInfo()->getSubReg(
DestReg, Hexagon::subreg_loreg);
unsigned DestHi = QTM.getSubtargetImpl()->getRegisterInfo()->getSubReg(
unsigned DestHi = Fn.getSubtarget().getRegisterInfo()->getSubReg(
DestReg, Hexagon::subreg_hireg);
int32_t LowWord = (ImmValue & 0xFFFFFFFF);
@ -176,6 +172,6 @@ bool HexagonSplitConst32AndConst64::runOnMachineFunction(MachineFunction &Fn) {
//===----------------------------------------------------------------------===//
FunctionPass *
llvm::createHexagonSplitConst32AndConst64(const HexagonTargetMachine &TM) {
return new HexagonSplitConst32AndConst64(TM);
llvm::createHexagonSplitConst32AndConst64() {
return new HexagonSplitConst32AndConst64();
}

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@ -144,12 +144,10 @@ void HexagonPassConfig::addPostRegAlloc() {
}
void HexagonPassConfig::addPreSched2() {
const HexagonTargetMachine &TM = getHexagonTargetMachine();
addPass(createHexagonCopyToCombine(), false);
if (getOptLevel() != CodeGenOpt::None)
addPass(&IfConverterID, false);
addPass(createHexagonSplitConst32AndConst64(TM));
addPass(createHexagonSplitConst32AndConst64());
}
void HexagonPassConfig::addPreEmitPass() {