From 01afec2adb909955317f27e3d8ee41a516969926 Mon Sep 17 00:00:00 2001
From: Evan Cheng <evan.cheng@apple.com>
Date: Thu, 16 Feb 2006 19:34:41 +0000
Subject: [PATCH] MOVAPSrr and MOVAPDrr instruction format should be MRMSrcReg.

llvm-svn: 26234
---
 llvm/lib/Target/X86/X86InstrInfo.td | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/llvm/lib/Target/X86/X86InstrInfo.td b/llvm/lib/Target/X86/X86InstrInfo.td
index 85aa669ae0c7..e061c81a9c1c 100644
--- a/llvm/lib/Target/X86/X86InstrInfo.td
+++ b/llvm/lib/Target/X86/X86InstrInfo.td
@@ -3013,10 +3013,10 @@ def FLDCW16m  : I<0xD9, MRM5m,                   // X87 control world = [mem16]
 // XMM Packed Floating point support (requires SSE / SSE2)
 //===----------------------------------------------------------------------===//
 
-def MOVAPSrr : I<0x28, MRMSrcMem, (ops V4F4:$dst, V4F4:$src),
+def MOVAPSrr : I<0x28, MRMSrcReg, (ops V4F4:$dst, V4F4:$src),
                 "movaps {$src, $dst|$dst, $src}", []>,
                Requires<[HasSSE1]>, TB;
-def MOVAPDrr : I<0x28, MRMSrcMem, (ops V2F8:$dst, V2F8:$src),
+def MOVAPDrr : I<0x28, MRMSrcReg, (ops V2F8:$dst, V2F8:$src),
                 "movapd {$src, $dst|$dst, $src}", []>,
                Requires<[HasSSE2]>, TB, OpSize;