AlphaSchedule.td: 7bit-ize.

llvm-svn: 114173
2010-09-17 09:56:43 +00:00 · 2010-09-17 09:56:43 +00:00 · 018f965a77
parent 00aff04c8d
commit 018f965a77
1 changed files with 1 additions and 1 deletions
--- a/llvm/lib/Target/Alpha/AlphaSchedule.td
+++ b/llvm/lib/Target/Alpha/AlphaSchedule.td
@ -50,7 +50,7 @@ def s_ftoi  : InstrItinClass;
 def s_itof  : InstrItinClass;
 def s_pseudo : InstrItinClass;

-//Table 24 Instruction Class Latency in Cycles
+//Table 2-4 Instruction Class Latency in Cycles
 //modified some

 def Alpha21264Itineraries : ProcessorItineraries<