forked from OSchip/llvm-project
Rename GRAD to GR32_AD, to follow the naming convention of other
classes. And define its SubRegClassList. llvm-svn: 77601
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@ -9110,7 +9110,7 @@ X86TargetLowering::getRegForInlineAsmConstraint(const std::string &Constraint,
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// 'A' means EAX + EDX.
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if (Constraint == "A") {
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Res.first = X86::EAX;
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Res.second = X86::GRADRegisterClass;
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Res.second = X86::GR32_ADRegisterClass;
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}
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return Res;
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}
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@ -674,7 +674,9 @@ def GR64_NOREX_NOSP : RegisterClass<"X86", [i64], 64,
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}
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// A class to support the 'A' assembler constraint: EAX then EDX.
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def GRAD : RegisterClass<"X86", [i32], 32, [EAX, EDX]>;
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def GR32_AD : RegisterClass<"X86", [i32], 32, [EAX, EDX]> {
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let SubRegClassList = [GR8_ABCD_L, GR8_ABCD_H, GR16_ABCD];
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}
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// Scalar SSE2 floating point registers.
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def FR32 : RegisterClass<"X86", [f32], 32,
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