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[ARM][MC] Update one test case in 'test/MC/Disassembler/ARM/invalid-armv7.txt' 

Summary:
Instruction `[0xfe 0xf0 0x20 0xe3]` is a valid instruction on ARM-v7, which is `dbg #14`. See: 
https://www.cl.cam.ac.uk/research/srg/han/ACS-P35/zynq/ARMv7-A-R-manual.pdf 
(Page: 377)

```
Encoding A1:
DBG<c> #<option>

|31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16|15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00|
|      cond | 0  0  1  1  0| 0| 1  0| 0  0  0  0| 1  1  1  1| 0  0  0  0| 1  1  1  1|    option |
```

Reviewers: fhahn, efriedma

Reviewed By: efriedma

Subscribers: javed.absar, kristof.beyls, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D58873

llvm-svn: 355374
This commit is contained in:
Xing GUO 2019-03-05 03:07:56 +00:00
parent efec1396ac
commit 013e17f50e
1 changed files with 3 additions and 3 deletions
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6
llvm/test/MC/Disassembler/ARM/invalid-armv7.txt
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@ -69,9 +69,9 @@
# Undefined encoding space for hint instructions
#------------------------------------------------------------------------------
# FIXME: is it "dbg #14" or not????
[0xfe 0xf0 0x20 0xe3]
# CHCK: invalid instruction encoding
[0xfe 0xf0 0x20 0xf3]
# CHECK: invalid instruction encoding
# CHECK-NEXT: [0xfe 0xf0 0x20 0xf3]
#------------------------------------------------------------------------------