forked from OSchip/llvm-project
[InstCombine] "X - (X / C) * C == 0" to "X & C-1 == 0"
Summary: "X % C == 0" is optimized to "X & C-1 == 0" (where C is a power-of-two) However, "X % Y" can also be represented as "X - (X / Y) * Y" so if I rewrite the initial expression: "X - (X / C) * C == 0" it's not currently optimized to "X & C-1 == 0", see godbolt: https://godbolt.org/z/KzuXUj This is my first contribution to LLVM so I hope I didn't mess things up Reviewers: lebedev.ri, spatel Reviewed By: lebedev.ri Subscribers: hiraditya, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D79369
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@ -1314,6 +1314,17 @@ Instruction *InstCombiner::visitAdd(BinaryOperator &I) {
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// X % C0 + (( X / C0 ) % C1) * C0 => X % (C0 * C1)
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if (Value *V = SimplifyAddWithRemainder(I)) return replaceInstUsesWith(I, V);
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// ((X s/ C1) << C2) + X => X s% -C1 where -C1 is 1 << C2
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const APInt *C1, *C2;
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if (match(LHS, m_Shl(m_SDiv(m_Specific(RHS), m_APInt(C1)), m_APInt(C2)))) {
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APInt one(C2->getBitWidth(), 1);
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APInt minusC1 = -(*C1);
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if (minusC1 == (one << *C2)) {
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Constant *NewRHS = ConstantInt::get(RHS->getType(), minusC1);
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return BinaryOperator::CreateSRem(RHS, NewRHS);
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}
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}
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// A+B --> A|B iff A and B have no bits set in common.
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if (haveNoCommonBitsSet(LHS, RHS, DL, &AC, &I, &DT))
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return BinaryOperator::CreateOr(LHS, RHS);
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@ -3,9 +3,7 @@
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define i8 @add-shl-sdiv-scalar0(i8 %x) {
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; CHECK-LABEL: @add-shl-sdiv-scalar0(
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; CHECK-NEXT: [[SD:%.*]] = sdiv i8 [[X:%.*]], -4
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; CHECK-NEXT: [[SL:%.*]] = shl i8 [[SD]], 2
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; CHECK-NEXT: [[RZ:%.*]] = add i8 [[SL]], [[X]]
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; CHECK-NEXT: [[RZ:%.*]] = srem i8 [[X:%.*]], 4
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; CHECK-NEXT: ret i8 [[RZ]]
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;
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%sd = sdiv i8 %x, -4
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@ -16,9 +14,7 @@ define i8 @add-shl-sdiv-scalar0(i8 %x) {
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define i8 @add-shl-sdiv-scalar1(i8 %x) {
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; CHECK-LABEL: @add-shl-sdiv-scalar1(
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; CHECK-NEXT: [[SD:%.*]] = sdiv i8 [[X:%.*]], -64
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; CHECK-NEXT: [[SL:%.*]] = shl i8 [[SD]], 6
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; CHECK-NEXT: [[RZ:%.*]] = add i8 [[SL]], [[X]]
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; CHECK-NEXT: [[RZ:%.*]] = srem i8 [[X:%.*]], 64
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; CHECK-NEXT: ret i8 [[RZ]]
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;
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%sd = sdiv i8 %x, -64
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@ -29,9 +25,7 @@ define i8 @add-shl-sdiv-scalar1(i8 %x) {
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define i32 @add-shl-sdiv-scalar2(i32 %x) {
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; CHECK-LABEL: @add-shl-sdiv-scalar2(
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; CHECK-NEXT: [[SD:%.*]] = sdiv i32 [[X:%.*]], -1073741824
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; CHECK-NEXT: [[SL:%.*]] = shl i32 [[SD]], 30
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; CHECK-NEXT: [[RZ:%.*]] = add i32 [[SL]], [[X]]
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; CHECK-NEXT: [[RZ:%.*]] = srem i32 [[X:%.*]], 1073741824
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; CHECK-NEXT: ret i32 [[RZ]]
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;
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%sd = sdiv i32 %x, -1073741824
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@ -44,9 +38,7 @@ define i32 @add-shl-sdiv-scalar2(i32 %x) {
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define <3 x i8> @add-shl-sdiv-splat0(<3 x i8> %x) {
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; CHECK-LABEL: @add-shl-sdiv-splat0(
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; CHECK-NEXT: [[SD:%.*]] = sdiv <3 x i8> [[X:%.*]], <i8 -4, i8 -4, i8 -4>
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; CHECK-NEXT: [[SL:%.*]] = shl <3 x i8> [[SD]], <i8 2, i8 2, i8 2>
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; CHECK-NEXT: [[RZ:%.*]] = add <3 x i8> [[SL]], [[X]]
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; CHECK-NEXT: [[RZ:%.*]] = srem <3 x i8> [[X:%.*]], <i8 4, i8 4, i8 4>
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; CHECK-NEXT: ret <3 x i8> [[RZ]]
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;
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%sd = sdiv <3 x i8> %x, <i8 -4, i8 -4, i8 -4>
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@ -57,9 +49,7 @@ define <3 x i8> @add-shl-sdiv-splat0(<3 x i8> %x) {
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define <4 x i32> @add-shl-sdiv-splat1(<4 x i32> %x) {
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; CHECK-LABEL: @add-shl-sdiv-splat1(
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; CHECK-NEXT: [[SD:%.*]] = sdiv <4 x i32> [[X:%.*]], <i32 -1073741824, i32 -1073741824, i32 -1073741824, i32 -1073741824>
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; CHECK-NEXT: [[SL:%.*]] = shl <4 x i32> [[SD]], <i32 30, i32 30, i32 30, i32 30>
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; CHECK-NEXT: [[RZ:%.*]] = add <4 x i32> [[SL]], [[X]]
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; CHECK-NEXT: [[RZ:%.*]] = srem <4 x i32> [[X:%.*]], <i32 1073741824, i32 1073741824, i32 1073741824, i32 1073741824>
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; CHECK-NEXT: ret <4 x i32> [[RZ]]
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;
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%sd = sdiv <4 x i32> %x, <i32 -1073741824, i32 -1073741824, i32 -1073741824, i32 -1073741824>
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@ -70,9 +60,7 @@ define <4 x i32> @add-shl-sdiv-splat1(<4 x i32> %x) {
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define <2 x i64> @add-shl-sdiv-splat2(<2 x i64> %x) {
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; CHECK-LABEL: @add-shl-sdiv-splat2(
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; CHECK-NEXT: [[SD:%.*]] = sdiv <2 x i64> [[X:%.*]], <i64 -32, i64 -32>
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; CHECK-NEXT: [[SL:%.*]] = shl <2 x i64> [[SD]], <i64 5, i64 5>
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; CHECK-NEXT: [[RZ:%.*]] = add <2 x i64> [[SL]], [[X]]
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; CHECK-NEXT: [[RZ:%.*]] = srem <2 x i64> [[X:%.*]], <i64 32, i64 32>
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; CHECK-NEXT: ret <2 x i64> [[RZ]]
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;
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%sd = sdiv <2 x i64> %x, <i64 -32, i64 -32>
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@ -87,9 +75,7 @@ declare void @use32(i32)
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define i32 @add-shl-sdiv-i32-4-use0(i32 %x) {
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; CHECK-LABEL: @add-shl-sdiv-i32-4-use0(
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; CHECK-NEXT: call void @use32(i32 [[X:%.*]])
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; CHECK-NEXT: [[SD:%.*]] = sdiv i32 [[X]], -16
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; CHECK-NEXT: [[SL:%.*]] = shl i32 [[SD]], 4
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; CHECK-NEXT: [[RZ:%.*]] = add i32 [[SL]], [[X]]
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; CHECK-NEXT: [[RZ:%.*]] = srem i32 [[X]], 16
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; CHECK-NEXT: ret i32 [[RZ]]
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;
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call void @use32(i32 %x)
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@ -103,8 +89,7 @@ define i32 @add-shl-sdiv-i32-use1(i32 %x) {
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; CHECK-LABEL: @add-shl-sdiv-i32-use1(
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; CHECK-NEXT: [[SD:%.*]] = sdiv i32 [[X:%.*]], -16
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; CHECK-NEXT: call void @use32(i32 [[SD]])
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; CHECK-NEXT: [[SL:%.*]] = shl i32 [[SD]], 4
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; CHECK-NEXT: [[RZ:%.*]] = add i32 [[SL]], [[X]]
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; CHECK-NEXT: [[RZ:%.*]] = srem i32 [[X]], 16
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; CHECK-NEXT: ret i32 [[RZ]]
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;
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%sd = sdiv i32 %x, -16
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@ -119,7 +104,7 @@ define i32 @add-shl-sdiv-i32-use2(i32 %x) {
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; CHECK-NEXT: [[SD:%.*]] = sdiv i32 [[X:%.*]], -16
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; CHECK-NEXT: [[SL:%.*]] = shl i32 [[SD]], 4
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; CHECK-NEXT: call void @use32(i32 [[SL]])
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; CHECK-NEXT: [[RZ:%.*]] = add i32 [[SL]], [[X]]
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; CHECK-NEXT: [[RZ:%.*]] = srem i32 [[X]], 16
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; CHECK-NEXT: ret i32 [[RZ]]
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;
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%sd = sdiv i32 %x, -16
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@ -135,7 +120,7 @@ define i32 @add-shl-sdiv-i32-use3(i32 %x) {
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; CHECK-NEXT: call void @use32(i32 [[SD]])
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; CHECK-NEXT: [[SL:%.*]] = shl i32 [[SD]], 4
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; CHECK-NEXT: call void @use32(i32 [[SL]])
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; CHECK-NEXT: [[RZ:%.*]] = add i32 [[SL]], [[X]]
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; CHECK-NEXT: [[RZ:%.*]] = srem i32 [[X]], 16
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; CHECK-NEXT: ret i32 [[RZ]]
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;
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%sd = sdiv i32 %x, -16
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@ -151,8 +136,7 @@ define <3 x i8> @add-shl-sdiv-use4(<3 x i8> %x) {
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; CHECK-LABEL: @add-shl-sdiv-use4(
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; CHECK-NEXT: [[SD:%.*]] = sdiv <3 x i8> [[X:%.*]], <i8 -4, i8 -4, i8 -4>
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; CHECK-NEXT: call void @use3xi8(<3 x i8> [[SD]])
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; CHECK-NEXT: [[SL:%.*]] = shl <3 x i8> [[SD]], <i8 2, i8 2, i8 2>
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; CHECK-NEXT: [[RZ:%.*]] = add <3 x i8> [[SL]], [[X]]
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; CHECK-NEXT: [[RZ:%.*]] = srem <3 x i8> [[X]], <i8 4, i8 4, i8 4>
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; CHECK-NEXT: ret <3 x i8> [[RZ]]
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;
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%sd = sdiv <3 x i8> %x, <i8 -4, i8 -4, i8 -4>
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