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Provide versions of the ARM eh_sjlj_setjmp instructions for non-VFP subtargets 

such that the non-VFP versions have no implicit defs of VFP registers.
If any callee-saved VFP registers are marked as having been defined, the
prologue/epilogue code will try to save and restore them.
Radar 7770432.

llvm-svn: 100892
This commit is contained in:
Bob Wilson 2010-04-09 20:41:18 +00:00
parent 26984fb4eb
commit 0106063556
3 changed files with 37 additions and 2 deletions
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19
llvm/lib/Target/ARM/ARMInstrInfo.td
View File

@ -124,6 +124,7 @@ def HasV6 : Predicate<"Subtarget->hasV6Ops()">;
def HasV6T2 : Predicate<"Subtarget->hasV6T2Ops()">;
def NoV6T2 : Predicate<"!Subtarget->hasV6T2Ops()">;
def HasV7 : Predicate<"Subtarget->hasV7Ops()">;
def NoVFP : Predicate<"!Subtarget->hasVFP2()">;
def HasVFP2 : Predicate<"Subtarget->hasVFP2()">;
def HasVFP3 : Predicate<"Subtarget->hasVFP3()">;
def HasNEON : Predicate<"Subtarget->hasNEON()">;
@ -2533,7 +2534,23 @@ let Defs =
"mov\tr0, #0\n\t"
"add\tpc, pc, #0\n\t"
"mov\tr0, #1 @ eh_setjmp end", "",
[(set R0, (ARMeh_sjlj_setjmp GPR:$src, GPR:$val))]>;
[(set R0, (ARMeh_sjlj_setjmp GPR:$src, GPR:$val))]>,
Requires<[IsARM, HasVFP2]>;
}
let Defs =
[ R0, R1, R2, R3, R4, R5, R6, R7, R8, R9, R10, R11, R12, LR ] in {
def Int_eh_sjlj_setjmp_nofp : XI<(outs), (ins GPR:$src, GPR:$val),
AddrModeNone, SizeSpecial, IndexModeNone,
Pseudo, NoItinerary,
"str\tsp, [$src, #+8] @ eh_setjmp begin\n\t"
"add\t$val, pc, #8\n\t"
"str\t$val, [$src, #+4]\n\t"
"mov\tr0, #0\n\t"
"add\tpc, pc, #0\n\t"
"mov\tr0, #1 @ eh_setjmp end", "",
[(set R0, (ARMeh_sjlj_setjmp GPR:$src, GPR:$val))]>,
Requires<[IsARM, NoVFP]>;
}
//===----------------------------------------------------------------------===//

18
llvm/lib/Target/ARM/ARMInstrThumb2.td
View File

@ -2386,9 +2386,25 @@ let Defs =
"\tb\t1f\n"
"\tmovs\tr0, #1\t@ end eh.setjmp\n"
"1:", "",
[(set R0, (ARMeh_sjlj_setjmp GPR:$src, tGPR:$val))]>;
[(set R0, (ARMeh_sjlj_setjmp GPR:$src, tGPR:$val))]>,
Requires<[IsThumb2, HasVFP2]>;
}
let Defs =
[ R0, R1, R2, R3, R4, R5, R6, R7, R8, R9, R10, R11, R12, LR ] in {
def t2Int_eh_sjlj_setjmp_nofp : Thumb2XI<(outs), (ins GPR:$src, tGPR:$val),
AddrModeNone, SizeSpecial, NoItinerary,
"str\t$val, [$src, #8]\t@ begin eh.setjmp\n"
"\tmov\t$val, pc\n"
"\tadds\t$val, #9\n"
"\tstr\t$val, [$src, #4]\n"
"\tmovs\tr0, #0\n"
"\tb\t1f\n"
"\tmovs\tr0, #1\t@ end eh.setjmp\n"
"1:", "",
[(set R0, (ARMeh_sjlj_setjmp GPR:$src, tGPR:$val))]>,
Requires<[IsThumb2, NoVFP]>;
}
//===----------------------------------------------------------------------===//

2
llvm/utils/TableGen/ARMDecoderEmitter.cpp
View File

@ -1672,6 +1672,8 @@ bool ARMDecoderEmitter::ARMDEBackend::populateInstruction(
// Ignore pseudo instructions.
if (Name == "tInt_eh_sjlj_setjmp" || Name == "t2Int_eh_sjlj_setjmp" ||
Name == "tInt_eh_sjlj_setjmp_nofp" ||
Name == "t2Int_eh_sjlj_setjmp_nofp" ||
Name == "t2MOVi32imm" || Name == "tBX" || Name == "tBXr9")
return false;