forked from OSchip/llvm-project
parent
6e49c48f97
commit
00a0d6f672
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@ -90,10 +90,16 @@ R600TargetLowering::R600TargetLowering(TargetMachine &TM) :
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setOperationAction(ISD::LOAD, MVT::i32, Custom);
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setOperationAction(ISD::LOAD, MVT::i32, Custom);
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setOperationAction(ISD::LOAD, MVT::v2i32, Custom);
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setOperationAction(ISD::LOAD, MVT::v2i32, Custom);
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setOperationAction(ISD::LOAD, MVT::v4i32, Custom);
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setOperationAction(ISD::LOAD, MVT::v4i32, Custom);
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// EXTLOAD should be the same as ZEXTLOAD. It is legal for some address
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// spaces, so it is custom lowered to handle those where it isn't.
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setLoadExtAction(ISD::SEXTLOAD, MVT::i8, Custom);
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setLoadExtAction(ISD::SEXTLOAD, MVT::i8, Custom);
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setLoadExtAction(ISD::SEXTLOAD, MVT::i16, Custom);
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setLoadExtAction(ISD::SEXTLOAD, MVT::i16, Custom);
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setLoadExtAction(ISD::ZEXTLOAD, MVT::i8, Custom);
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setLoadExtAction(ISD::ZEXTLOAD, MVT::i8, Custom);
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setLoadExtAction(ISD::ZEXTLOAD, MVT::i16, Custom);
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setLoadExtAction(ISD::ZEXTLOAD, MVT::i16, Custom);
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setLoadExtAction(ISD::EXTLOAD, MVT::i8, Custom);
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setLoadExtAction(ISD::EXTLOAD, MVT::i16, Custom);
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setOperationAction(ISD::STORE, MVT::i8, Custom);
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setOperationAction(ISD::STORE, MVT::i8, Custom);
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setOperationAction(ISD::STORE, MVT::i32, Custom);
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setOperationAction(ISD::STORE, MVT::i32, Custom);
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setOperationAction(ISD::STORE, MVT::v2i32, Custom);
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setOperationAction(ISD::STORE, MVT::v2i32, Custom);
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@ -1226,7 +1232,9 @@ SDValue R600TargetLowering::LowerLOAD(SDValue Op, SelectionDAG &DAG) const
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}
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}
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int ConstantBlock = ConstantAddressBlock(LoadNode->getAddressSpace());
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int ConstantBlock = ConstantAddressBlock(LoadNode->getAddressSpace());
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if (ConstantBlock > -1 && LoadNode->getExtensionType() != ISD::SEXTLOAD) {
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if (ConstantBlock > -1 &&
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((LoadNode->getExtensionType() == ISD::NON_EXTLOAD) ||
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(LoadNode->getExtensionType() == ISD::ZEXTLOAD))) {
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SDValue Result;
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SDValue Result;
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if (isa<ConstantExpr>(LoadNode->getSrcValue()) ||
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if (isa<ConstantExpr>(LoadNode->getSrcValue()) ||
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isa<Constant>(LoadNode->getSrcValue()) ||
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isa<Constant>(LoadNode->getSrcValue()) ||
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@ -0,0 +1,51 @@
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; RUN: llc -march=r600 -mcpu=cypress < %s | FileCheck -check-prefix=EG %s
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; EG-LABEL: @anyext_load_i8:
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; EG: AND_INT
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; EG-NEXT: 255
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define void @anyext_load_i8(i8 addrspace(1)* nocapture noalias %out, i8 addrspace(1)* nocapture noalias %src) nounwind {
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%cast = bitcast i8 addrspace(1)* %src to i32 addrspace(1)*
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%load = load i32 addrspace(1)* %cast, align 1
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%x = bitcast i32 %load to <4 x i8>
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%castOut = bitcast i8 addrspace(1)* %out to <4 x i8> addrspace(1)*
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store <4 x i8> %x, <4 x i8> addrspace(1)* %castOut, align 1
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ret void
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}
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; EG-LABEL: @anyext_load_i16:
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; EG: AND_INT
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; EG: LSHL
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; EG: 65535
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define void @anyext_load_i16(i16 addrspace(1)* nocapture noalias %out, i16 addrspace(1)* nocapture noalias %src) nounwind {
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%cast = bitcast i16 addrspace(1)* %src to i32 addrspace(1)*
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%load = load i32 addrspace(1)* %cast, align 1
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%x = bitcast i32 %load to <2 x i16>
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%castOut = bitcast i16 addrspace(1)* %out to <2 x i16> addrspace(1)*
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store <2 x i16> %x, <2 x i16> addrspace(1)* %castOut, align 1
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ret void
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}
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; EG-LABEL: @anyext_load_lds_i8:
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; EG: AND_INT
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; EG-NEXT: 255
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define void @anyext_load_lds_i8(i8 addrspace(3)* nocapture noalias %out, i8 addrspace(3)* nocapture noalias %src) nounwind {
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%cast = bitcast i8 addrspace(3)* %src to i32 addrspace(3)*
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%load = load i32 addrspace(3)* %cast, align 1
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%x = bitcast i32 %load to <4 x i8>
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%castOut = bitcast i8 addrspace(3)* %out to <4 x i8> addrspace(3)*
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store <4 x i8> %x, <4 x i8> addrspace(3)* %castOut, align 1
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ret void
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}
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; EG-LABEL: @anyext_load_lds_i16:
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; EG: AND_INT
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; EG: LSHL
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; EG: 65535
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define void @anyext_load_lds_i16(i16 addrspace(3)* nocapture noalias %out, i16 addrspace(3)* nocapture noalias %src) nounwind {
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%cast = bitcast i16 addrspace(3)* %src to i32 addrspace(3)*
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%load = load i32 addrspace(3)* %cast, align 1
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%x = bitcast i32 %load to <2 x i16>
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%castOut = bitcast i16 addrspace(3)* %out to <2 x i16> addrspace(3)*
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store <2 x i16> %x, <2 x i16> addrspace(3)* %castOut, align 1
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ret void
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}
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