forked from OSchip/llvm-project
Round 2 of dead private variable removal.
LLVM is now -Wunused-private-field clean except for - lib/MC/MCDisassembler/Disassembler.h. Not sure why it keeps all those unaccessible fields. - gtest. llvm-svn: 158096
This commit is contained in:
parent
89b639e9a8
commit
009b1c1cf1
llvm
include/llvm/Analysis
lib
Analysis
CodeGen
ExecutionEngine/MCJIT
Target
tools/llvm-prof
unittests/Support
utils/TableGen
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@ -28,7 +28,6 @@ class BasicBlock;
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class ProfileInfoLoader {
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const std::string &Filename;
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Module &M;
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std::vector<std::string> CommandLines;
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std::vector<unsigned> FunctionCounts;
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std::vector<unsigned> BlockCounts;
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@ -39,8 +38,7 @@ class ProfileInfoLoader {
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public:
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// ProfileInfoLoader ctor - Read the specified profiling data file, exiting
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// the program if the file is invalid or broken.
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ProfileInfoLoader(const char *ToolName, const std::string &Filename,
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Module &M);
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ProfileInfoLoader(const char *ToolName, const std::string &Filename);
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static const unsigned Uncounted;
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@ -83,10 +83,8 @@ const unsigned ProfileInfoLoader::Uncounted = ~0U;
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// program if the file is invalid or broken.
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//
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ProfileInfoLoader::ProfileInfoLoader(const char *ToolName,
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const std::string &Filename,
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Module &TheModule) :
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Filename(Filename),
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M(TheModule), Warned(false) {
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const std::string &Filename)
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: Filename(Filename), Warned(false) {
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FILE *F = fopen(Filename.c_str(), "rb");
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if (F == 0) {
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errs() << ToolName << ": Error opening '" << Filename << "': ";
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@ -152,7 +152,7 @@ void LoaderPass::readEdge(ProfileInfo::Edge e,
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}
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bool LoaderPass::runOnModule(Module &M) {
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ProfileInfoLoader PIL("profile-loader", Filename, M);
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ProfileInfoLoader PIL("profile-loader", Filename);
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EdgeInformation.clear();
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std::vector<unsigned> Counters = PIL.getRawEdgeCounts();
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@ -52,7 +52,6 @@ static cl::opt<bool> DisableHoisting("disable-spill-hoist", cl::Hidden,
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namespace {
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class InlineSpiller : public Spiller {
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MachineFunctionPass &Pass;
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MachineFunction &MF;
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LiveIntervals &LIS;
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LiveStacks &LSS;
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@ -137,8 +136,7 @@ public:
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InlineSpiller(MachineFunctionPass &pass,
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MachineFunction &mf,
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VirtRegMap &vrm)
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: Pass(pass),
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MF(mf),
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: MF(mf),
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LIS(pass.getAnalysis<LiveIntervals>()),
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LSS(pass.getAnalysis<LiveStacks>()),
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AA(&pass.getAnalysis<AliasAnalysis>()),
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@ -73,7 +73,6 @@ class RAGreedy : public MachineFunctionPass,
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// analyses
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SlotIndexes *Indexes;
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LiveStacks *LS;
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MachineDominatorTree *DomTree;
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MachineLoopInfo *Loops;
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EdgeBundles *Bundles;
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@ -45,7 +45,7 @@ ExecutionEngine *MCJIT::createJIT(Module *M,
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// If the target supports JIT code generation, create the JIT.
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if (TargetJITInfo *TJ = TM->getJITInfo())
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return new MCJIT(M, TM, *TJ, new MCJITMemoryManager(JMM, M), GVsWithCode);
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return new MCJIT(M, TM, *TJ, new MCJITMemoryManager(JMM), GVsWithCode);
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if (ErrorStr)
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*ErrorStr = "target does not support JIT code generation";
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@ -22,15 +22,11 @@ namespace llvm {
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// matching LLVM IR counterparts in the module(s) being compiled.
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class MCJITMemoryManager : public RTDyldMemoryManager {
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virtual void anchor();
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JITMemoryManager *JMM;
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OwningPtr<JITMemoryManager> JMM;
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// FIXME: Multiple modules.
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Module *M;
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public:
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MCJITMemoryManager(JITMemoryManager *jmm, Module *m) :
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JMM(jmm?jmm:JITMemoryManager::CreateDefaultMemManager()), M(m) {}
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// We own the JMM, so make sure to delete it.
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~MCJITMemoryManager() { delete JMM; }
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MCJITMemoryManager(JITMemoryManager *jmm) :
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JMM(jmm?jmm:JITMemoryManager::CreateDefaultMemManager()) {}
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uint8_t *allocateDataSection(uintptr_t Size, unsigned Alignment,
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unsigned SectionID) {
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@ -30,12 +30,6 @@ using namespace llvm;
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// very little right now.
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//===----------------------------------------------------------------------===//
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SPUHazardRecognizer::SPUHazardRecognizer(const TargetInstrInfo &tii) :
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TII(tii),
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EvenOdd(0)
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{
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}
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/// Return the pipeline hazard type encountered or generated by this
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/// instruction. Currently returns NoHazard.
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///
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@ -24,12 +24,8 @@ class TargetInstrInfo;
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/// SPUHazardRecognizer
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class SPUHazardRecognizer : public ScheduleHazardRecognizer
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{
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private:
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const TargetInstrInfo &TII;
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int EvenOdd;
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public:
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SPUHazardRecognizer(const TargetInstrInfo &TII);
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SPUHazardRecognizer(const TargetInstrInfo &/*TII*/) {}
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virtual HazardType getHazardType(SUnit *SU, int Stalls);
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virtual void EmitInstruction(SUnit *SU);
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virtual void AdvanceCycle();
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@ -86,7 +86,6 @@ namespace llvm {
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class SPUTargetLowering :
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public TargetLowering
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{
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int VarArgsFrameIndex; // FrameIndex for start of varargs area.
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SPUTargetMachine &SPUTM;
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public:
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@ -250,12 +250,8 @@ int getNVPTXVectorSize(TargetRegisterClass const *RC) {
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NVPTXRegisterInfo::NVPTXRegisterInfo(const TargetInstrInfo &tii,
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const NVPTXSubtarget &st)
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: NVPTXGenRegisterInfo(0),
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TII(tii),
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ST(st) {
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Is64Bit = st.is64Bit();
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}
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: NVPTXGenRegisterInfo(0),
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Is64Bit(st.is64Bit()) {}
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#define GET_REGINFO_TARGET_DESC
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#include "NVPTXGenRegisterInfo.inc"
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@ -31,8 +31,6 @@ class NVPTXSubtarget;
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class NVPTXRegisterInfo : public NVPTXGenRegisterInfo {
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private:
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const TargetInstrInfo &TII;
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const NVPTXSubtarget &ST;
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bool Is64Bit;
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// Hold Strings that can be free'd all together with NVPTXRegisterInfo
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ManagedStringPool ManagedStrPool;
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@ -22,10 +22,9 @@ namespace llvm {
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class SparcSubtarget;
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class SparcFrameLowering : public TargetFrameLowering {
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const SparcSubtarget &STI;
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public:
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explicit SparcFrameLowering(const SparcSubtarget &sti)
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: TargetFrameLowering(TargetFrameLowering::StackGrowsDown, 8, 0), STI(sti) {
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explicit SparcFrameLowering(const SparcSubtarget &/*sti*/)
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: TargetFrameLowering(TargetFrameLowering::StackGrowsDown, 8, 0) {
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}
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/// emitProlog/emitEpilog - These methods insert prolog and epilog code into
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@ -78,8 +78,7 @@ static void storeToStack(MachineBasicBlock &MBB,
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//===----------------------------------------------------------------------===//
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XCoreFrameLowering::XCoreFrameLowering(const XCoreSubtarget &sti)
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: TargetFrameLowering(TargetFrameLowering::StackGrowsDown, 4, 0),
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STI(sti) {
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: TargetFrameLowering(TargetFrameLowering::StackGrowsDown, 4, 0) {
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// Do nothing
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}
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@ -22,7 +22,6 @@ namespace llvm {
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class XCoreSubtarget;
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class XCoreFrameLowering: public TargetFrameLowering {
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const XCoreSubtarget &STI;
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public:
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XCoreFrameLowering(const XCoreSubtarget &STI);
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@ -281,7 +281,7 @@ int main(int argc, char **argv) {
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// using the standard profile info provider pass, but for now this gives us
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// access to additional information not exposed via the ProfileInfo
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// interface.
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ProfileInfoLoader PIL(argv[0], ProfileDataFile, *M);
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ProfileInfoLoader PIL(argv[0], ProfileDataFile);
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// Run the printer pass.
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PassManager PassMgr;
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@ -167,13 +167,13 @@ TEST(TypeBuilderTest, Context) {
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&(TypeBuilder<types::i<1>, true>::get(context2))->getContext());
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}
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class MyType {
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struct MyType {
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int a;
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int *b;
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void *array[1];
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};
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class MyPortableType {
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struct MyPortableType {
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int32_t a;
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int32_t *b;
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void *array[1];
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@ -23,10 +23,9 @@ namespace llvm {
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/// and emission of the instruction selector.
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///
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class DAGISelEmitter : public TableGenBackend {
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RecordKeeper &Records;
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CodeGenDAGPatterns CGP;
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public:
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explicit DAGISelEmitter(RecordKeeper &R) : Records(R), CGP(R) {}
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explicit DAGISelEmitter(RecordKeeper &R) : CGP(R) {}
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// run - Output the isel, returning true on failure.
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void run(raw_ostream &OS);
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